SPRACC0A November 2017 – November 2020 TMS320F28075 , TMS320F28075-Q1 , TMS320F28076 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377D-EP , TMS320F28377D-Q1 , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28378D , TMS320F28378S , TMS320F28379D , TMS320F28379D-Q1
It is not the intention of this paper to go into details on defects generated during the manufacturing of a semiconductor device. The SRAM, being such a prevalent, dense, and sensitive circuit, is handed with significant attention in semiconductor device testing. The testing environment includes advanced and often proprietary testing algorithms. The manufacturing test environment allows for testing with voltage/temperature/frequency margining that is not possible in the end system. The semiconductor device designs include special test modes to allow the manufacturing test to include even further margin testing.