SPRACC0A November   2017  – November 2020 TMS320F28075 , TMS320F28075-Q1 , TMS320F28076 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377D-EP , TMS320F28377D-Q1 , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28378D , TMS320F28378S , TMS320F28379D , TMS320F28379D-Q1

 

  1.   Trademarks
  2. 1 Introduction and Scope
  3. 2 SRAM Bit Array
  4. 3 Sources of SRAM Failures
    1. 3.1 Manufacturing Defects
      1. 3.1.1 Time Zero Fails
      2. 3.1.2 Latent Fails
    2. 3.2 Circuit Drift With Usage
    3. 3.3 Circuit Overstress
    4. 3.4 Soft Errors
      1. 3.4.1 Radioactive Events
      2. 3.4.2 Dynamic Voltage Events
      3. 3.4.3 Summary of Error Sources
  5. 4 Methods for Managing Memory Failures in Electronic Systems
    1. 4.1 Start-Up Testing
    2. 4.2 In-System Testing
    3. 4.3 Parity Detection
    4. 4.4 Error Detection and Correction (EDAC)
    5. 4.5 Redundancy
  6. 5 Comparisons and Conclusions
  7. 6  C2000 Memory Types Example
    1. 6.1 TMS320F2837xD
  8. 7 Memory Types
    1. 7.1 Dedicated RAM (Mx and Dx RAM)
    2. 7.2 Local Shared RAM (LSx RAM)
    3. 7.3 Global Shared RAM (GSx RAM)
    4. 7.4 CPU Message RAM (CPU MSGRAM)
    5. 7.5 CLA Message RAM (CLA MSGRAM)
  9. 8 Summary
  10. 9 References
  11. 10Revision History

1 Introduction and Scope

With today’s significant reliance on electronic control and management comes concern for the safety of the electronic operation. One key point of concern is the operation of the SRAM in the system. This is important and from some perspectives, the most important aspect of safety in the execution of electronics. This is because:

  • SRAM is a large component in the overall device, often the largest.
    • Largest in area
    • Largest in transistor count
  • SRAM is very dense circuitry and therefore susceptible to disturb or subtle defects.
  • SRAM operates in reduced voltage ranges vs normal circuit logic and therefore susceptible to disturbances.

For these reasons, SRAM bit cell and array layouts are key components to any new integrated circuit process development and qualification. It is where integrated circuit fabrication experts go to find drift and variation in manufacturing. This is why SRAM Error Detection is important in safety related electronics. If you would like to skip to the end, see Section 8.

The discussion includes:

  • Section 2: An overview of SRAM bit array organization
  • Section 3: A summary of SRAM failure mechanism including where each is of concern
  • Section 4: Methods available for managing memory failures in the electronic system
  • Section 6: Specific to TMS320C2000 products