SPRACF0C May   2018  – August 2024 TMS320C28341 , TMS320C28342 , TMS320C28343 , TMS320C28343-Q1 , TMS320C28344 , TMS320C28345 , TMS320C28346 , TMS320C28346-Q1 , TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1 , TMS320F2802-Q1 , TMS320F28020 , TMS320F28021 , TMS320F28022 , TMS320F28022-Q1 , TMS320F28023 , TMS320F28023-Q1 , TMS320F28026 , TMS320F28026-Q1 , TMS320F28026F , TMS320F28027 , TMS320F28027-Q1 , TMS320F28027F , TMS320F28027F-Q1 , TMS320F28030 , TMS320F28030-Q1 , TMS320F28031 , TMS320F28031-Q1 , TMS320F28032 , TMS320F28032-Q1 , TMS320F28033 , TMS320F28033-Q1 , TMS320F28034 , TMS320F28034-Q1 , TMS320F28035 , TMS320F28035-Q1 , TMS320F28050 , TMS320F28051 , TMS320F28052 , TMS320F28052-Q1 , TMS320F28052F , TMS320F28052F-Q1 , TMS320F28052M , TMS320F28052M-Q1 , TMS320F28053 , TMS320F28054 , TMS320F28054-Q1 , TMS320F28054F , TMS320F28054F-Q1 , TMS320F28054M , TMS320F28054M-Q1 , TMS320F28055 , TMS320F2806-Q1 , TMS320F28062 , TMS320F28062-Q1 , TMS320F28062F , TMS320F28062F-Q1 , TMS320F28063 , TMS320F28064 , TMS320F28065 , TMS320F28066 , TMS320F28066-Q1 , TMS320F28067 , TMS320F28067-Q1 , TMS320F28068F , TMS320F28068M , TMS320F28069 , TMS320F28069-Q1 , TMS320F28069F , TMS320F28069F-Q1 , TMS320F28069M , TMS320F28069M-Q1 , TMS320F28075 , TMS320F28075-Q1 , TMS320F28232 , TMS320F28232-Q1 , TMS320F28234 , TMS320F28234-Q1 , TMS320F28235 , TMS320F28235-Q1 , TMS320F28332 , TMS320F28333 , TMS320F28334 , TMS320F28335 , TMS320F28335-Q1 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377D-Q1 , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28379D , TMS320F28379D-Q1 , TMS320F28379S

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1What Is JTAG?
  5. 2Common JTAG Debug Probes
  6. 3Debug Steps for LaunchPad™ Development Kits and controlCARDs
    1. 3.1 LaunchPad™ Development Kits
    2. 3.2 controlCARDs
  7. 4Common Error Codes
    1. 4.1 Common Error Codes
  8. 5Multiple Devices in JTAG Chain
  9. 6JTAG Connectivity Debug Flows
    1. 6.1 Overall Debug Flow
    2. 6.2 High-Voltage Isolation Check Flow
    3. 6.3 Main JTAG Debug Flow
  10. 7Detailed Flow Step Information
    1. 7.1 Isolation Pre-Check Flow
    2. 7.2 JTAG Debug Flow
  11. 8References
  12. 9Revision History

Common Error Codes

Table 4-1 lists the common error codes and the associated debug steps.

Table 4-1 Common Error Codes Table
Error Message Debug Steps
This error is generated by TI's USCIF driver or utilities.
The value is '-233' (0xffffff17).
The title is 'SC_ERR_PATH_BROKEN'.
The explanation is: The JTAG IR and DR scan-paths cannot circulate bits, they may be broken.
An attempt to scan the JTAG scan-path has failed.
The target's JTAG scan-path appears to be broken with a stuck-at-ones or stuck-at-zero fault.

This error is usually reported when the JTAG signals are not connected correctly, though the error can also be caused by poor signal quality.

This also occurs if the debug probe is using a 4-pin JTAG when TDI and TDO are used as general-purpose inputs - outputs (GPIO) at runtime.

This can also occur if pullup or pulldown resistors are too strong, so try removing them when debugging.

This error sometimes occurs if the device is not booting correctly. Watch the power rails and XRSn with an oscilloscope to make sure that the device boots correctly and XRSn goes high. XRSn periodically rebooting is expected on unprogrammed devices due to the watchdog.

See the buffered case section of the hardware design guide.

Error connecting to the target: (Error -1015 @ 0x0) Device is not responding to the request. Device may be locked, or the debug probe connection may be unreliable. Unlock the device if possible (e.g. use wait in reset mode, and power-cycle the board.) If error persists, confirm configuration and/or try more reliable JTAG settings (e.g. lower TCLK).

1. Verify that Test Connection in the target configuration passes. If the connection fails, follow the steps for that error code.

2. Set device to wait-boot mode.

3. Follow the Manual Launch instructions and connect to the device.

4. Verify that you are able to read PARTID in the memory browser.

5. Try again to program the device.

6. If applying these steps still fails to clear the error, check the following: Are there password locations on the device? On-chip flash tool settings? Is it possible to program RAM only?

Error connecting to the target: (Error -151 @ 0x0) One of the FTDI driver functions used during the connect returned bad status or an error. The cause may be one or more of: no XDS100 is plugged in, invalid XDS100 serial number, blank XDS100 EEPROM, missing FTDI drivers, faulty USB cable.

Use the xds100serial command-line utility in the 'common/uscif' folder to verify the XDS100 can be located.

(Emulation package 8.0.903.2)

1. Check the target configuration file to make sure that the correct debug probe is selected.

2. Check to see if debug probe is visible in PC device manager.

3. Try replacing the USB cable, or try a different debug probe to make sure the probe in use is not damaged.

Trouble Reading Register PC: (Error -1156 @ 0x0) Device may be operating in low-power mode. Do you want to bring it out of this mode? Choose 'Yes' to force the device to wake up and retry the operation. Choose 'No' to retry the operation without waking the device.

1. Verify that Test Connection in the target configuration passes. If the connection fails, follow the steps for that error code.

2. Set device to wait-boot mode.

3. Follow the Manual Launch instructions and connect to the device.

4. Verify that you are able to read PARTID in the memory browser.

5. Try again to program the device.

6. If applying these steps still fails to clear the error, check the following: Are there password locations on the device? On-chip flash tool settings? Is it possible to program RAM only?

C28xx_CPU1: Error: (Error -1044 @ 0x0) The debug probe reported an error. Confirm debug probe configuration and connections, reset the debug probe, and retry the operation.

Try power cycling the debug probe without power cycling the target MCU. Try more reliable JTAG settings like lower clock frequency.

The value is '-230' (0xffffff1a).

The title is 'SC_ERR_PATH_MEASURE'.

The explanation is: The measured lengths of the JTAG IR and DR scan-paths are invalid.

This indicates that an error exists in the link-delay or scan-path.

This error is typically reported when the JTAG signals have poor signal quality. Try lower TCK frequency and check trace lengths.

See the buffered case section of the hardware design guide.

C28xx_CPU1: Trouble Setting Breakpoint with the Action "Continue or Finish Stepping" at 0x83146: (Error -1066 @ 0x83146) Unable to set/clear requested breakpoint. Verify that the breakpoint address is in valid memory. (Emulation package 9.13.0.00201) C28xx_CPU1: Breakpoint Manager: Retrying with a AET breakpoint

For some devices, only one breakpoint is allowed when running code from flash since hardware breakpoints must be used. Check the device data sheet for the number of hardware breakpoints.

Error Initializing Emulator: (Error -2083 @ 0x0) Unable to communicate with the debug probe. Confirm debug probe configuration and connections, reset the debug probe, and retry the operation.

1. Check the target configuration file to make sure that the correct debug probe is selected.

2. Check to see if debug probe is visible in the PC device manager.

3. Try replacing the USB cable, or try a different debug probe to make sure the probe in use is not damaged.

Error connecting to the target: (Error -2131 @ 0x0) Unable to access the device register. Reset the device, and retry the operation. If error persists, confirm configuration, pwer-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK).

1. Verify that Test Connection in the target configuration passes. If the connection fails, follow the steps for that error code.

2. Set device to wait-boot mode.

3. Follow the Manual Launch instructions and connect to the device.

4. Verify that you are able to read PARTID in the memory browser.

5. Try again to program the device.

6. If applying these steps still fails to clear the error, check the following: Are there password locations on the device? On-chip flash tool settings? Is it possible to program RAM only?

This error is generated by TI's USCIF driver or utilities.

The value is '-242' (0xffffff0e).

The title is 'SC_ERR_ROUTER_ACCESS_SUBPATH'.

The explanation is: A router subpath could not be accessed.

The board configuration file is probably incorrect.

1. Check the target configuration file to make sure that the correct debug probe is selected.

2. Check to see if the debug probe is visible in the PC device manager.

3. Try replacing the USB cable, or try a different debug probe to make sure the probe in use is not damaged.

Error connecting to the target: (Error -267 @ 0x0) The controller could not detect valid target supply. JTAG connection and/or connection setting specifying voltage level.

This error message only happens if the VTREF pin on the debug probe is not connected to 3.3V. Make sure that the target board is powered on.

C28xx: Failed CPU Reset: (Error -1137 @ 0x0) Device is held in reset. Take the device out of reset, and retry the operation.

1. Verify that Test Connection in the target configuration passes. If the connection fails, follow the steps for that error code.

2. Set device to wait-boot mode.

3. Follow the Manual Launch instructions and connect to the device.

4. Verify that you are able to read PARTID in the memory browser.

5. Try again to program the device.

6. If applying these steps still fails to clear the error, check the following: Are there password locations on the device? On-chip flash tool settings? Is it possible to program RAM only?

The JTAG IR Integrity scan-test has failed.

The JTAG DR Integrity scan-test has failed.

This error is reported when the JTAG signals have poor signal quality. Try lower TCK frequency and check trace lengths.

See the buffered case section of the hardware design guide.