3.4.3 Adding SFRA Library to the Project

1. Include the SFRA library in source code of your project where you want to run SFRA.
#include “sfra_f32.h”

Add the SFRA library path in the include paths under Project Properties → Build → C2000 Compiler → Include Options (see Figure 4).

Figure 4. Compiler Options for a Project Using SFRA Float Library

NOTE

The exact locations may vary depending on where SFRA is installed and which other libraries the project is using.

Link SFRA library: (sfra_f32_coff/eabi.lib or sfra_f32_tmu_coff/eabi.lib) in the project depending on the device you have selected, the lib is located at:

<sfra_install_path>\lib

Figure 5 shows the changes to the linker options that are required to include the SFRA library.

NOTE

FastRTS library must be included, for steps on including fastRTS library. For more information, see the FastRTS library documentation found at:

<sdk_install_path>\C2000Ware\libraries\math\FPUfastRTS\c28
Figure 5. Adding Linker Options to the CCS Project to Include SFRA Library in Floating-Point With TMU Project

NOTE

The exact locations may vary depending on where controlSUITE is installed and which other libraries the project is using.

2. Add #defines for SFRA, such as the SFRA_ISR_FREQ, is the frequency of the ISR in which the SFRA routine will be called from. SFRA_FREQ_START is the start frequency of the SFRA analysis. SFRA_FREQ_LENGTH is the number of points in SFRA analysis. SFRA_FREQ_STEP_MULTIPLY specifies the the step size between individual points of SFRA sweep. The end frequency of the SFRA analysis is dependent on the start frequency, the length, and the step size.
#define SFRA_ISR_FREQ CONTROL_ISR_FREQUENCY #define SFRA_FREQ_START 2 // // SFRA step Multiply = 10^(1/No of steps per decade(40)) // #define SFRA_FREQ_STEP_MULTIPLY (float32_t)1.105 #define SFRA_AMPLITUDE (float32_t)0.005 #define SFRA_FREQ_LENGTH 100 …
3. Define SFRA_F32 object and arrays for the SFRA data storage. For the non TMU version of the library, add an extern to the the FPUsinTable to avoid compiler warnings.
SFRA_F32 sfra1; float32_t plantMagVect[SFRA_FREQ_LENGTH]; float32_t plantPhaseVect[SFRA_FREQ_LENGTH]; float32_t olMagVect[SFRA_FREQ_LENGTH]; float32_t olPhaseVect[SFRA_FREQ_LENGTH]; float32_t clMagVect[SFRA_FREQ_LENGTH]; float32_t clPhaseVect[SFRA_FREQ_LENGTH]; float32_t freqVect[SFRA_FREQ_LENGTH]; // //extern to access tables in ROM // extern long FPUsinTable[];
4. Steup of the SFRA module is carried out by the following routine. This routine is run before SFRA is called in the ISR. Pass a NULL for the arrays/vectors that are not stored.
// //Resets the internal data of sfra module to zero // SFRA_F32_reset(&sfra1); // //Configures the SFRA module // SFRA_F32_config(&sfra1, SFRA_ISR_FREQ, SFRA_AMPLITUDE, SFRA_FREQ_LENGTH, SFRA_FREQ_START, SFRA_FREQ_STEP_MULTIPLY, plantMagVect, plantPhaseVect, olMagVect, olPhaseVect, clMagVect, clPhaseVect freqVect); // //Resets the response arrays to all zeroes // SFRA_F32_resetFreqRespArray(&sfra1); // // Initializes the frequency response array , // The first element is SFRA_FREQ_START // The subsequent elements are freqVect[n-1]*SFRA_FREQ_STEP_MULTIPLY // This enables placing a fixed number of frequency points // between a decade of frequency. // The below routine can be substituted by a routine that sets // the frequency points arbitrarily as needed. // SFRA_F32_initFreqArrayWithLogSteps(&sfra1, SFRA_FREQ_START, SFRA_FREQ_STEP_MULTIPLY);

NOTE

Even though in the above sequence the array is initialized with log step frequencies, the SFRA is in no way dependent on that. The frequency array initialization sequence can be replaced with any other as desired by the application.

5. Using the module, add the code to the ISR to call the SFRA as shown below around the compensator input and outputs:
   1. Using SFRA in a closed loop system to get loop gain(GH) and plant(H) frequency response:
   interrupt void PWM_ISR(void) { …. // // Read ADC and computer Fbk Value // Fdbk = (float32)Vout1R/(4096.0); // // Add FRA injection into the reference of the controller // Ref = SFRA_F32_inject(Vout1SetSlewed); // // Call the controller // Out=DCL_PI_C1(&dcl_obj,Ref,Fdbk); // // Update PWM value // EPwm1Regs.CMPA.half.CMPA = ((long)(BUCK_PWM_PERIOD))*Out; SFRA_F32_collect(&Out,&Fdbk); … }
   2. Using SFRA in open loop to get plant(H) frequency response:
   interrupt void PWM_ISR(void) { …. // // Read ADC and computer Fbk Value // Vout1_Read = (float32)Vout1R/(4096.0); // // Add SFRA injection into the duty cycle for the open loop converter // Duty_pu=SFRA_F32_inject(Duty_pu_DC); // // Update PWM value // EPwm1Regs.CMPA.half.CMPA=((long)(BUCK_PWM_PERIOD))* Duty_pu; SFRA_F32_collect(&Duty_pu,&Vout1_Read); ….. }
6. Background task: Call the background function in a slow task.
SFRA_F32_runBackgroundTask(&sfra1);
7. Linker command file changes (*.CMD): When running from FLASH for best performance, the inject and collect operations need to reside in RAM. The following are the changes and additions to CMD file for the SFRA library inclusion and best performance.
…. ramfuncs : LOAD = FLASHD, RUN = RAML0L1, LOAD_START(_RamfuncsLoadStart), LOAD_END(_RamfuncsLoadEnd), RUN_START(_RamfuncsRunStart), PAGE = 0 { --library=sfra_f32_coff.lib<SFRA_F32_inject.obj> --library=sfra_f32_coff.lib<SFRA_F32_collect.obj> } …. SFRA_F32_Data : > dataRAM1, PAGE = 1
8. Also make sure the ROM location for the math tables is defined correctly. These locations are defined in the device command file, which is available through C2000Ware for devices that do not have TMU. Note that the following location is correct for F28069.
/* FPU Math Tables in Boot ROM */ FPUTABLES : origin = 0x3FD860, length = 0x0006A0 …. /* Allocate FPU math areas: */ FPUmathTables : > FPUTABLES, PAGE = 0, TYPE = NOLOAD
9. For devices with TMU math tables that are not in ROM and must be assigned to a memory location to avoid linker warnings:
FPUmathTables : > FLASH1, PAGE =1