0h |
32 |
ICSSM_PR1_MII_RT_PR1_MII_RT_CFG_RXCFG0 |
4803 2000h |
4h |
32 |
ICSSM_PR1_MII_RT_PR1_MII_RT_CFG_RXCFG1 |
4803 2004h |
10h |
32 |
ICSSM_PR1_MII_RT_PR1_MII_RT_CFG_TXCFG0 |
4803 2010h |
14h |
32 |
ICSSM_PR1_MII_RT_PR1_MII_RT_CFG_TXCFG1 |
4803 2014h |
20h |
32 |
ICSSM_PR1_MII_RT_PR1_MII_RT_CFG_TX_CRC0 |
4803 2020h |
24h |
32 |
ICSSM_PR1_MII_RT_PR1_MII_RT_CFG_TX_CRC1 |
4803 2024h |
30h |
32 |
ICSSM_PR1_MII_RT_PR1_MII_RT_CFG_TX_IPG0 |
4803 2030h |
34h |
32 |
ICSSM_PR1_MII_RT_PR1_MII_RT_CFG_TX_IPG1 |
4803 2034h |
38h |
32 |
ICSSM_PR1_MII_RT_PR1_MII_RT_CFG_PRS0 |
4803 2038h |
3Ch |
32 |
ICSSM_PR1_MII_RT_PR1_MII_RT_CFG_PRS1 |
4803 203Ch |
40h |
32 |
ICSSM_PR1_MII_RT_PR1_MII_RT_CFG_RX_FRMS0 |
4803 2040h |
44h |
32 |
ICSSM_PR1_MII_RT_PR1_MII_RT_CFG_RX_FRMS1 |
4803 2044h |
48h |
32 |
ICSSM_PR1_MII_RT_PR1_MII_RT_CFG_RX_PCNT0 |
4803 2048h |
4Ch |
32 |
ICSSM_PR1_MII_RT_PR1_MII_RT_CFG_RX_PCNT1 |
4803 204Ch |
50h |
32 |
ICSSM_PR1_MII_RT_PR1_MII_RT_CFG_RX_ERR0 |
4803 2050h |
54h |
32 |
ICSSM_PR1_MII_RT_PR1_MII_RT_CFG_RX_ERR1 |
4803 2054h |
60h |
32 |
ICSSM_PR1_MII_RT_PR1_MII_RT_CFG_RX_FIFO_LEVEL0 |
4803 2060h |
64h |
32 |
ICSSM_PR1_MII_RT_PR1_MII_RT_CFG_RX_FIFO_LEVEL1 |
4803 2064h |
68h |
32 |
ICSSM_PR1_MII_RT_PR1_MII_RT_CFG_TX_FIFO_LEVEL0 |
4803 2068h |
6Ch |
32 |
ICSSM_PR1_MII_RT_PR1_MII_RT_CFG_TX_FIFO_LEVEL1 |
4803 206Ch |