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This EVM features the LMZ31710 (10-A), LMZ31707 (7-A), or LMZ31704 (4-A) synchronous buck power module configured for operation with typical 5-V and 12-V input bus applications. The output voltage can be set to one of seven popular values by using a configuration jumper. In similar fashion, the switching frequency can be set to one of seven values with a jumper. The full output current rating of the device can be supplied by the EVM. Input and output capacitors are included on the board to accommodate the entire range of input and output voltages. Monitoring test points are provided to allow measurement of the following:
Control test points are provided for use of the PWRGD, inhibit/UVLO, synchronization, and slow-start/tracking features of the LMZ317xx device. The EVM uses a recommended PCB layout that maximizes thermal performance and minimizes output ripple and noise.
Figure 2-1 highlights the user interface items associated with the EVM. The polarized PVin Power terminal block (TB1) is used for connection to the host input supply and the polarized Vout Power terminal block (TB2) is used for connection to the load. These terminal blocks can accept up to 16-AWG wire. The polarized Vbias terminal block (TB3) is used along with the VIN select jumper (P1) when optional split power supply operation is desired. Refer to the LMZ317xx data sheets (LMZ31710 10-A Module, 2.95-V to 17-V Input and Current Sharing in QFN Package Data Sheet, LMZ31707 7-A Power Module with 2.95-V to 17-V Input Current Sharing in QFN Data Sheet, and LMZ31704 4-A Power Module with 2.95-V to 17-V Input and Current Sharing Data Sheet) for further information on split power supply operation.
The PVin Monitor and Vout Monitor test points located near the power terminal blocks are intended to be used as voltage monitoring points where voltmeters can be connected to measure PVin and Vout. The voltmeter references should be connected to any of the four PVin/Vout Monitor Grounds test points located between the power terminal blocks. Do not use these PVin and Vout monitoring test points as the input supply or output load connection points. The PCB traces connecting to these test points are not designed to support high currents.
The PVin Scope and Vout Scope test points can be used to monitor PVin and Vout waveforms with an oscilloscope. These test points are intended for use with un-hooded scope probes outfitted with a low-inductance ground lead (ground spring) mounted to the scope barrel. The two sockets of each test point are on 0.1 in centers. The scope probe tip should be connected to the socket labeled PVin or Vout, and the scope ground lead should be connected to the socket labeled PGND.
The Controls test points located directly below the device are made available to test the features of the device. Any external connections made to these test points should be referenced to the Control Ground test point located along the bottom of the EVM. Refer to Section 3 for more information on the individual control test points.
The Vout Select jumper (P3) and Fsw Select jumper (P2) are provided for selecting the desired output voltage and appropriate switching frequency. Before applying power to the EVM, ensure that the jumpers are present and properly positioned for the intended output voltage. Refer to Table 2-1 for the recommended jumper settings. Always remove input power before changing the jumper settings.
Once the jumper settings have been confirmed, configure the host input supply to apply the appropriate bus voltage listed in Table 2-1 and confirm that the selected output voltage is obtained.
VOUT Select | FSW Select | PVin Bus Voltage |
---|---|---|
5.0 V | 1 MHz | 12 V |
3.3 V | 750 kHz | 5 V or 12 V |
2.5 V | 750 kHz | 5 V or 12 V |
1.8 V | 500 kHz | 5 V or 12 V |
1.2 V | 300 kHz | 5 V or 12 V |
0.9 V | 250 kHz | 5 V or 12 V |
0.6 V | 200 kHz | 5 V or 12 V |
Twelve wire-loop test points and two scope probe test points have been provided as convenient connection points for digital voltmeters (DVM) or oscilloscope probes to aid in the evaluation of the device. A description of each test point follows:
Test Point | Description |
---|---|
PVIN | Input voltage monitor. Connect DVM to this point to measure efficiency. |
VOUT | Output voltage monitor. Connect DVM to this point to measure efficiency, line regulation, and load regulation. |
AGND | Input and output voltage monitor grounds (located between terminal blocks). Reference the above DVMs to any of these four analog ground points. |
PVIN Scope (J1) | Input voltage scope monitor. Connect an oscilloscope to this set of points to measure input ripple voltage. |
VOUT Scope (J2) | Output voltage scope monitor. Connect an oscilloscope to this set of points to measure output ripple voltage and transient response. |
PWRGD | Monitors the power-good signal of the device. This is an open-drain signal that requires an external pullup resistor if monitoring is desired. A 10-kΩ to 100-kΩ pullup resistor is recommended. PWRGD is high if the output voltage is within 92% to 107% of its nominal value. |
INH/UVLO | Connect this point to control ground to inhibit the device. Allow this point to float to enable the device. An external resistor divider can be connected between this point, control ground, and VIN to adjust the UVLO of the device. |
RT/CLK | Connects to the RT/CLK pin of the device. An external clock signal can be applied to this point to synchronize the device to an appropriate frequency. |
SS/TR | Connects to the internal slow-start capacitor of the device. An external capacitor can be connected from this point to control ground to increase the slow-start time of the device. This point can also be used to track applications. |
SYNC_OUT | This output provides a clock signal that is 180° out of phase with the PH node of the device and can be used to synchronize other devices. |
AGND | Control ground (located along bottom of EVM). Reference any signals associated with the control test points to this analog ground point. |
In order to operate the EVM using a single power supply, the Vin Select jumper (P1) must be in the default PVIN-VIN position shown in Figure 2-1. In this position, the PVin and Vin pins of the device are connected together. The UVLO threshold of the EVM is approximately 4 V with 0.15 V of hysteresis. The input voltage must be above the UVLO threshold in order for the device to start-up. After start-up, the minimum input voltage to the device must be at least 4.5 V or (VOUT + 0.7 V), whichever is greater. The maximum operating input voltage for the device is 17 V. Refer to the LMZ317xx data sheets for further information on the input voltage range, UVLO operation, and optional split power supply operation for operating with PVin as low as 2.95 V when using an external Vbias supply.
After application of the proper input voltage, the output voltage of the device will ramp to its final value in approximately 1.2 ms. If desired, this soft-start time can be increased by adding a capacitor to the SS/TR test point as described above. Refer to the LMZ317xx data sheets for further information on adjusting the soft-start time.
Table 2-1 lists the recommended switching frequencies for each of the VOUT selections. These recommendations cover operation over a wide range of input voltage and output load conditions. Several factors such as duty cycle, minimum on-time, minimum off-time, and current limit influence selection of the appropriate switching frequency. In some applications, other switching frequencies can be used for particular output voltages, depending on the above factors. Refer to the LMZ317xx data sheets for further information on switching frequency selection, including synchronization.
The EVM includes input and output capacitors to accommodate the entire range of input and output voltage conditions. The actual capacitance required will depend on the input and output voltage conditions of the particular application, along with the desired transient response. In most cases, the required output capacitance will be less than that supplied on the EVM. Refer to the LMZ317xx data sheets for further information on the minimum required I/O capacitance and transient response.
The LMZ317xx operates in pulse skip mode at light currents to improve light load efficiency (LLE mode). At output voltages of less than 1.5 V, the pulse skipping can cause the output to rise when there is no load to discharge the energy. A minimum load of 600 µA or less, depending on VOUT, is required to keep the output voltage within regulation. For the worst case condition of VOUT = 0.6 V, a 1-kΩ resistor would provide a required minimum load of 600 µA. If the application requires an additional load to meet the minimum load requirement, the additional load can be connected external to the EVM or installed in the R16 position on the underside of the EVM. Refer to the LMZ317xx data sheets for further information on LLE mode and determining the required minimum load.