SBAA532A February   2022  – March 2024 ADS1119 , ADS1120 , ADS1120-Q1 , ADS112C04 , ADS112U04 , ADS1130 , ADS1131 , ADS114S06 , ADS114S06B , ADS114S08 , ADS114S08B , ADS1158 , ADS1219 , ADS1220 , ADS122C04 , ADS122U04 , ADS1230 , ADS1231 , ADS1232 , ADS1234 , ADS1235 , ADS1235-Q1 , ADS124S06 , ADS124S08 , ADS1250 , ADS1251 , ADS1252 , ADS1253 , ADS1254 , ADS1255 , ADS1256 , ADS1257 , ADS1258 , ADS1258-EP , ADS1259 , ADS1259-Q1 , ADS125H01 , ADS125H02 , ADS1260 , ADS1260-Q1 , ADS1261 , ADS1261-Q1 , ADS1262 , ADS1263 , ADS127L01 , ADS130E08 , ADS131A02 , ADS131A04 , ADS131E04 , ADS131E06 , ADS131E08 , ADS131E08S , ADS131M02 , ADS131M03 , ADS131M04 , ADS131M06 , ADS131M08

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Bridge Overview
  5. 2Bridge Construction
    1. 2.1 Active Elements in Bridge Topologies
      1. 2.1.1 Bridge With One Active Element
        1. 2.1.1.1 Reducing Non-Linearity in a Bridge With One Active Element Using Current Excitation
      2. 2.1.2 Bridge With Two Active Elements in Opposite Branches
        1. 2.1.2.1 Eliminating Non-Linearity in a Bridge With Two Active Elements in Opposite Branches Using Current Excitation
      3. 2.1.3 Bridge With Two Active Elements in the Same Branch
      4. 2.1.4 Bridge With Four Active Elements
    2. 2.2 Strain Gauge and Bridge Construction
  6. 3Bridge Connections
    1. 3.1 Ratiometric Measurements
    2. 3.2 Four-Wire Bridge
    3. 3.3 Six-Wire Bridge
  7. 4Electrical Characteristics of Bridge Measurements
    1. 4.1 Bridge Sensitivity
    2. 4.2 Bridge Resistance
    3. 4.3 Output Common-Mode Voltage
    4. 4.4 Offset Voltage
    5. 4.5 Full-Scale Error
    6. 4.6 Non-Linearity Error and Hysteresis
    7. 4.7 Drift
    8. 4.8 Creep and Creep Recovery
  8. 5Signal Chain Design Considerations
    1. 5.1 Amplification
      1. 5.1.1 Instrumentation Amplifier
        1. 5.1.1.1 INA Architecture and Operation
        2. 5.1.1.2 INA Error Sources
      2. 5.1.2 Integrated PGA
        1. 5.1.2.1 Integrated PGA Architecture and Operation
        2. 5.1.2.2 Benefits of Using an Integrated PGA
    2. 5.2 Noise
      1. 5.2.1 Noise in an ADC Data Sheet
      2. 5.2.2 Calculating NFC for a Bridge Measurement System
    3. 5.3 Channel Scan Time and Signal Bandwidth
      1. 5.3.1 Noise Performance
      2. 5.3.2 ADC Conversion Latency
      3. 5.3.3 Digital Filter Frequency Response
    4. 5.4 AC Excitation
    5. 5.5 Calibration
      1. 5.5.1 Offset Calibration
      2. 5.5.2 Gain Calibration
      3. 5.5.3 Calibration Example
  9. 6Bridge Measurement Circuits
    1. 6.1 Four-Wire Resistive Bridge Measurement with a Ratiometric Reference and a Unipolar, Low-Voltage (≤5 V) Excitation Source
      1. 6.1.1 Schematic
      2. 6.1.2 Pros and Cons
      3. 6.1.3 Parameters and Variables
      4. 6.1.4 Design Notes
      5. 6.1.5 Measurement Conversion
      6. 6.1.6 Generic Register Settings
    2. 6.2 Six-Wire Resistive Bridge Measurement With a Ratiometric Reference and a Unipolar, Low-Voltage (≤ 5 V) Excitation Source
      1. 6.2.1 Schematic
      2. 6.2.2 Pros and Cons
      3. 6.2.3 Parameters and Variables
      4. 6.2.4 Design Notes
      5. 6.2.5 Measurement Conversion
      6. 6.2.6 Generic Register Settings
    3. 6.3 Four-Wire Resistive Bridge Measurement With a Pseudo-Ratiometric Reference and a Unipolar, High-Voltage (> 5 V) Excitation Source
      1. 6.3.1 Schematic
      2. 6.3.2 Pros and Cons
      3. 6.3.3 Parameters and Variables
      4. 6.3.4 Design Notes
      5. 6.3.5 Measurement Conversion
      6. 6.3.6 Generic Register Settings
    4. 6.4 Four-Wire Resistive Bridge Measurement with a Pseudo-Ratiometric Reference and Asymmetric, High-Voltage (> 5 V) Excitation Source
      1. 6.4.1 Schematic
      2. 6.4.2 Pros and Cons
      3. 6.4.3 Parameters and Variables
      4. 6.4.4 Design Notes
      5. 6.4.5 Measurement Conversion
      6. 6.4.6 Generic Register Settings
    5. 6.5 Four-Wire Resistive Bridge Measurement With a Ratiometric Reference and Current Excitation
      1. 6.5.1 Schematic
      2. 6.5.2 Pros and Cons
      3. 6.5.3 Parameters and Variables
      4. 6.5.4 Design Notes
      5. 6.5.5 Measurement Conversion
      6. 6.5.6 Generic Register Settings
    6. 6.6 Measuring Multiple Four-Wire Resistive Bridges in Series with a Pseudo-Ratiometric Reference and a Unipolar, Low-Voltage (≤5V) Excitation Source
      1. 6.6.1 Schematic
      2. 6.6.2 Pros and Cons
      3. 6.6.3 Parameters and Variables
      4. 6.6.4 Design Notes
      5. 6.6.5 Measurement Conversion
      6. 6.6.6 Generic Register Settings
    7. 6.7 Measuring Multiple Four-Wire Resistive Bridges in Parallel Using a Single-Channel ADC With a Ratiometric Reference and a Unipolar, Low-Voltage (≤ 5 V) Excitation Source
      1. 6.7.1 Schematic
      2. 6.7.2 Pros and Cons
      3. 6.7.3 Parameters and Variables
      4. 6.7.4 Design Notes
      5. 6.7.5 Measurement Conversion
      6. 6.7.6 Generic Register Settings
    8. 6.8 Measuring Multiple Four-Wire Resistive Bridges in Parallel Using a Multichannel ADC With a Ratiometric Reference and a Unipolar, Low-Voltage (≤ 5 V) Excitation Source
      1. 6.8.1 Schematic
      2. 6.8.2 Pros and Cons
      3. 6.8.3 Parameters and Variables
      4. 6.8.4 Design Notes
      5. 6.8.5 Measurement Conversion
      6. 6.8.6 Generic Register Settings
  10. 7Summary
  11. 8Revision History

6.8.4 Design Notes

The unipolar excitation voltage, VEXCITATION, is used as the ADC supply voltage (AVDD) as well as the ADC reference voltage, VREF. Small variations in the bridge resistance due to tension or compression change the differential output voltage for each bridge. The system measures each bridge output and the PGA integrated into the ADC gains up the low-level signal to reduce system noise and utilize more of the ADC full-scale range (FSR). The ADC samples and converts this amplified voltage against VREF, which is the same voltage used to excite each bridge and therefore ratiometric. The excitation source noise and drift are seen equally in both VIN and VREF in a ratiometric reference configuration, effectively removing these errors from the ADC output code. The host processor sums the ADC output from each bridge to determine the value of the applied load.

Measuring multiple four-wire resistive bridges in parallel using a multichannel ADC, a ratiometric reference, and a unipolar, low-voltage (≤ 5 V) supply requires:

  • Multiple differential analog inputs (AINPx and AINNx) or external multiplexer
  • External reference input (dedicated pin or use analog supply)
  • Low-noise amplifier

Similar to the previous bridge circuit, a common application for measuring multiple resistive bridges in parallel using a multichannel ADC is determining the weight of a load on a platform. The bridges are placed at specific points around the platform and each bridge is measured by the ADC. The host processor sums these individual measurements together to determine the weight of the load. This is especially useful when the load is not centered on the platform, since the weight measured by each bridge scales relative to the distance from the load. A red, centered load is shown in Figure 6-20 (left) while a non-centered load is shown in Figure 6-20 (right). Each platform in Figure 6-20 has four bridges (in blue), similar to the system shown in Figure 6-19.

GUID-20211110-SS0I-FHHR-GXP7-18KJZS6CT6LH-low.svgFigure 6-20 Measuring a Load on a Platform Using Multiple Bridges in Parallel: Centered Load (left) and Non-Centered Load (right)

In Figure 6-20 (left), each bridge ideally measures 1/4 of the overall load when the load is centered on the platform. When the load is not centered, as shown in Figure 6-20 (right), Bridge 1 (B1) and Bridge 3 (B3) measure a larger percentage of the overall load compared to Bridge 2 (B2) and Bridge 4 (B4). For example, B1 and B3 might each measure 45% of the total load, while B2 and B4 only measure 5% each. As a result, it is important to use bridges with similar parameters (should be the same for each bridge) as mentioned in Table 6-18 because this helps simplify how the total load weight is determined.

Specifically, the total load, Load(System Max), in a parallel bridge configuration is equal to the sum of the maximum load that can be applied to each bridge, Load(Bridge Max). Assuming the table note for Table 6-18 is respected such that Load(Bridge Max) is the same for all bridges, then Load(System Max) = # of bridges • Load(Bridge Max). For example, if Load(Bridge Max) = 5 kg for each bridge in Figure 6-19, then Load(System Max) = 4 • 5 kg = 20 kg. Therefore, it must be assumed that any bridge can deliver the maximum differential output voltage, VOUT(Bridge Max), at any time. VOUT(Bridge Max) should be the same for all bridges, and the equation is shown in Table 6-19.

After VOUT(System Max) has been determined, choose the corresponding gain value for the ADC PGA. The amplifier gain should be the largest allowable value that is still less than the ADC FSR. In some cases it is not possible to choose an amplifier gain that uses the entire ADC FSR. While this is often an acceptable tradeoff between resolution and ease-of-use, take care to ensure that all system requirements are still met when the ADC FSR cannot be maximized.

Next, ensure that the bridge output common-mode voltage, VCM(Bridge), defined in Table 6-19 is within the common-mode range of the ADC amplifier, VCM(ADC), under a no-load condition (R1 = R2 = R3 = R4). The amplifier common-mode range varies by component, and is defined in the data sheet based on the gain setting and supply voltage. However, targeting VCM(Bridge) = AVDD / 2 is a good choice as this is typically in the center of the VCM(ADC) range, enabling the highest gain possible per the previous step. Moreover, the bridge configuration in Figure 6-19 inherently sets VCM(Bridge) to AVDD / 2 under a no-load condition when VEXCITATION = AVDD.

Then, follow the instructions in Section 5.5 if calibration is required. Note that each bridge in Figure 6-19 must be calibrated separately, requiring the host processor to calculate and store multiple sets of calibration coefficients.

Finally, the host processor needs to convert the ADC output code from each bridge measurement to a voltage and then sum these values together to determine the value of the applied load.