SBOA542 November   2022 TMP1826 , TMP1827

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Bus Reset and Response
    2. 1.2 Host Write, Device Read
    3. 1.3 Host Read, Device Write
  4. 2Interfacing TMP1826 With the Host MCU
    1. 2.1 Using GPIO as Host Interface
    2. 2.2 Software Driver for GPIO
    3. 2.3 Using UART as Host Interface
    4. 2.4 Software Driver for UART
    5. 2.5 Using SPI as Host Interface
    6. 2.6 Software Driver for SPI
  5. 3Summary
  6. 4References

1.3 Host Read, Device Write

A host read is the means by which the hosts gets the data from the device or the CRC for data integrity check. A host read starts by the host driving the data line low as shown in Figure 1-4. When the device detects the falling edge, the device can drive the line low before the time tRL. The host can release the bus from the side after the time tRL(MIN) elapses. If the device intends to transmit a logic '1', then the bus is released before tRL(MAX) elapses. If the device intends to transmit a logic '0', then the bus is released after tSLOT(MIN). The host must sample the line after the time tRWAIT, for a time frame indicated by tMSW. The host must factor the rise time due to the pullup resistor and bus capacitance to determine the sampling window for the host to sample the bit level sent by the device or to drive the next read bit time slot.

Figure 1-4 Host Read, Device Write