SBOS854F March   2018  – June 2024 TMP1075

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics:TMP1075
    6. 6.6  Electrical Characteristics: TMP1075N
    7. 6.7  Timing Requirements:TMP1075
    8. 6.8  Timing Requirements: TMP1075N
    9. 6.9  Switching Characteristics
    10. 6.10 Timing Diagrams
    11. 6.11 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Digital Temperature Output
      2. 7.3.2 I2C and SMBus Serial Interface
        1. 7.3.2.1  Bus Overview
        2. 7.3.2.2  Serial Bus Address
        3. 7.3.2.3  Pointer Register
          1. 7.3.2.3.1 Pointer Register Byte [reset = 00h]
        4. 7.3.2.4  Writing and Reading to the TMP1075
        5. 7.3.2.5  Operation Mode
          1. 7.3.2.5.1 Receiver Mode
          2. 7.3.2.5.2 Transmitter Mode
        6. 7.3.2.6  SMBus Alert Function
        7. 7.3.2.7  General Call- Reset Function
        8. 7.3.2.8  High-Speed Mode (HS)
        9. 7.3.2.9  Coexists in I3C Mixed Fast Mode
        10. 7.3.2.10 Time-Out Function
      3. 7.3.3 Timing Diagrams
      4. 7.3.4 Two-Wire Timing Diagrams
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode (SD)
      2. 7.4.2 One-Shot Mode (OS)
      3. 7.4.3 Continuous Conversion Mode (CC)
      4. 7.4.4 Thermostat Mode (TM)
        1. 7.4.4.1 Comparator Mode (TM = 0)
        2. 7.4.4.2 Interrupt Mode (TM = 1)
        3. 7.4.4.3 Polarity Mode (POL)
    5. 7.5 Register Map
      1. 7.5.1 Register Descriptions
        1. 7.5.1.1 Temperature Register (address = 00h) [default reset = 0000h]
        2. 7.5.1.2 Configuration Register (address = 01h) [default reset = 00FFh (60A0h TMP1075N)]
        3. 7.5.1.3 Low Limit Register (address = 02h) [default reset = 4B00h]
        4. 7.5.1.4 High Limit Register (address = 03h) [default reset = 5000h]
        5. 7.5.1.5 Device ID Register (address = 0Fh) [default reset = 7500]
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Migrating From the xx75 Device Family
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

10 Revision History

Changes from Revision E (August 2021) to Revision F (June 2024)

  • Changed all instances of legacy terminology to controller and target where I2C is mentionedGo
  • Updated the number format for tables, figures, and cross-references throughout the documentGo
  • Changed the "Conversion time" for TMP1075N throughout the documentGo
  • Changed the shutdown and average current for TMP1075N throughout the documentGo
  • Changed DRL package Thermal Information section.Go
  • Changed "Conversion time" for TMP1075N in Electrical Characteristics table.Go
  • Changed Average current consumption for TMP1075N in Electrical Characteristics table.Go
  • Changed Shutdown current for TMP1075N in Electrical Characteristics table.Go
  • Added Two-Wire Timing DiagramGo
  • Changed conversion rate of TMP1075N from 35 ms to 250 ms Go

Changes from Revision D (October 2019) to Revision E (August 2021)

  • Added TMP1075N features to listGo
  • Added typical accuracy specification to features listGo
  • Added the SOT563 (TMP1075N orderable) packageGo
  • Added Device Comparison SectionGo
  • Added figures for different package optionsGo
  • Added column for TMP1075N pin numbersGo
  • Added TMP1075N SpecificationsGo
  • Added TMP1075NDRL Temperature Error vs. Temperature graph Go
  • Added TMP1075N information in Overview SectionGo
  • Changed the Functional Block Diagram to apply to TMP1075NGo
  • Added number of I2C addresses available on TMP1075N to Serial Bus Address Section. Go
  • Added table for TMP1075N address options. Go
  • Updated internal register structure figure to apply to TMP1075NGo
  • Added typical specification for TMP1075N timeout Go
  • Added clarification on timeout function to include SCLGo
  • Removed redundant information to accurate describe all packagesGo
  • Added TMP1075N OS bit behaviorGo
  • Added TMP1075N Continuous Conversion Mode informationGo
  • Updated Conversion Rate Diagram to reflect all TMP1075 and TMP1075NGo
  • Clarified what TM bit behavior for TMP1075 and TMP1075N Go
  • Added table note to indicate Device ID register is not available on TMP1075NGo
  • Added TMP1075N configuration register information Go
  • Updated text to indicate that device ID register does not apply to TMP1075NGo
  • Added number of I2C addresses available on TMP1075NGo
  • Changed Typical Connections figure to apply to TMP1075NGo
  • Removed redundant Application Curve sectionGo
  • Updated text to include TMP1075N informationGo
  • Updated Migrating From the xx75 Device Family section to specify TMP1075 compatible packages Go
  • Included TMP1075N information to Power Supply RecommendationsGo
  • Added figures to the Layout Example section for each packageGo

Changes from Revision C (January 2019) to Revision D (October 2019)

  • Added software compatibility to feature listGo
  • Updated pointer register to be part of the serial interface descriptionGo
  • Updated the register map table to new formatGo
  • Added access type codes for register bitsGo
  • Updated temperature register format and bit definition tableGo
  • Changed configuration register format and bit definition table Go
  • Updated low limit register format and bit definition table Go
  • Updated high limit register format and bit definition table Go
  • Updated device ID register format and bit definition table Go

Changes from Revision B (December 2018) to Revision C (January 2019)

  • Changed TMP1075DSG package moved from Preview to Production DataGo
  • Changed min/max limit from 1.5°C to 1°C in the Temperature Accuracy (DGK & D) graphGo
  • Changed min/max limit from 1.5°C to 1°C in the DGK & D Temperature Error vs. Temperature graphGo
  • Added DSG Temperature Error vs. Temperature graph Go

Changes from Revision A (June 2018) to Revision B (December 2018)

  • Added TMP1075DSG package Go
  • Updated description section of the data sheet and added a Description (continued) sectionGo
  • Added TMP1075 configuration register support for single byte read and writeGo
  • Added Software support section for migrating from xx75 to TMP1075 Go

Changes from Revision * (March 2018) to Revision A (June 2018)

  • Changed the TMP1075DGK orderable status from Advanced Information to Production DataGo
  • Added SOIC and DFN packagesGo
  • Changed the Functional Block Diagram Go
  • Changed Digital Temperature Output cross-reference from: Temperature Register (0x00) to: Temperature Data Format Go
  • Changed the Temperature Data Format table Go
  • Changed and renamed the Address Pins and Slave Addresses for the TMP1075 table to Address Pins State Go
  • Changed the Two-Wire Timing Diagrams section Go
  • Added content to the Device Functional Modes section Go