Low ON resistance, 125Ω (typical) over
15VP-P signal input range for VDD – VEE =
18V
High OFF resistance, channel leakage of ±10pA
(typical) at VDD – VEE = 18V
Logic-level conversion for digital addressing
signals of 3V to 20V (VDD – VSS = 3V to 20V) to switch
analog signals to 20VP-P (VDD – VEE = 20V)
matched switch characteristics, rON = 5Ω (typical) for VDD
– VEE = 15V very low quiescent power dissipation under all
digital-control input and supply conditions, 0.2µW (typical) at VDD –
VSS = VDD – VEE = 10V
Binary address decoding on chip
5V, 10V, and 15V parametric ratings
100% tested for quiescent current at 20V
Maximum input current of 1µA at 18V over full
package temperature range, 100nA at 18V and 25°C