SLAAE72 December   2022 MSPM0L1105 , MSPM0L1106 , MSPM0L1303 , MSPM0L1304 , MSPM0L1304-Q1 , MSPM0L1305 , MSPM0L1305-Q1 , MSPM0L1306 , MSPM0L1306-Q1 , MSPM0L1343 , MSPM0L1344 , MSPM0L1345 , MSPM0L1346

 

  1.   Abstract
  2.   Trademarks
  3. 1Overview
  4. 2Low-Power Features in PMCU
    1. 2.1 Overview
      1. 2.1.1 Power Domains and Power Modes
    2. 2.2 Power Management (PMU)
      1. 2.2.1 Supply Supervisors
      2. 2.2.2 Peripheral Power Control
      3. 2.2.3 VBOOST for Analog Muxes
    3. 2.3 Clock Module (CKM)
      1. 2.3.1 Oscillators
      2. 2.3.2 Clocks
      3. 2.3.3 Asynchronous Fast Clock Requests
      4. 2.3.4 Shutdown Mode Handling
  5. 3Low-Power Optimization
    1. 3.1 Low-Power Basics
    2. 3.2 MSPM0 Low-Power Feature Use
      1. 3.2.1 Low-Power Modes
      2. 3.2.2 System Clock and Peripheral Operation Frequency
      3. 3.2.3 I/O Configuration
      4. 3.2.4 Event Manager
      5. 3.2.5 Analog Peripheral Low-Power Features
      6. 3.2.6 Run Code From RAM
    3. 3.3 Software Coding Strategies
    4. 3.4 Hardware Design Strategies
  6. 4Power Consumption Measurement and Evaluation
    1. 4.1 Current Evaluation
    2. 4.2 Current Measurement
      1. 4.2.1 Current Measurement

3.3 Software Coding Strategies

Conditional code execution

One commonly used software structure is to use a conditional wake-up and code execution structure. A common wake-up source is RTC. If the MCU does not have RTC, the application can use TIMG as a replacement. Find the static current information in the data sheet.

Non-blocking programming

In low-power applications, it is necessary to avoid blocking mode by using while loop. Using non-blocking mode paired with interrupts and polling to wake up the CPU to process tasks is more acceptable. Although it will sacrifice time and resources to wake up and respond to interrupt sources, push and pop the stack, it can save more power.

Optimize code size

Small code size means that CPU needs less time to finish tasks in active mode. The easiest way is to choose a highly optimized compiler such as TI Arm Clang Compiler and leverage the supplied code optimization levels. You can also spend some time or coding skills to realize this aim.