SLAAEE6 October 2023 MSPM0L1306 , MSPM0L1306
For more information, see structure1 in Figure 5-4. ADC channel 12 and ADC channel 7 is used to test the voltage divided by R1 and R2. You will also increase the DAC output to make OPA1 output closed to the ADC full range, to increase the accuracy. In order to reduce the resistance influence of GPIO trace, choose to test the voltage at OPA0 internal ADC trace directly, instead of the GPIO output (PA22/A4). Equation 6 is the calibration equation based on ADC detected numbers:
In this current detection demo, as the VDD=1.8 V and the selected internal reference is 1.4 V. In order to get a high changeable OPA1 voltage output range with GAIN32 and GAIN16 setting paired with DAC change, we choose to make (R1+R2)/R1 = 8.