SLAAEI9 December 2023 MSPM0C1103 , MSPM0C1103-Q1 , MSPM0C1104 , MSPM0C1104-Q1 , MSPM0G1105 , MSPM0G1106 , MSPM0G1107 , MSPM0G1505 , MSPM0G1506 , MSPM0G1507 , MSPM0G1519 , MSPM0G3105 , MSPM0G3105-Q1 , MSPM0G3106 , MSPM0G3106-Q1 , MSPM0G3107 , MSPM0G3107-Q1 , MSPM0G3505 , MSPM0G3505-Q1 , MSPM0G3506 , MSPM0G3506-Q1 , MSPM0G3507 , MSPM0G3507-Q1 , MSPM0G3519 , MSPM0L1105 , MSPM0L1106 , MSPM0L1227 , MSPM0L1228
MSPM0 GPIO functionality covers almost all the features provided by STM8S and STML series. STM8 uses the term Pin Functions and Port Function to refer to all the functionality responsible for managing the device pins, generating interrupts, and so forth. Here is the description of MSPM0 GPIO and IOMUX function:
Together MSPM0 GPIO and IOMUX cover the same functionality as STM8 GPIO. Additionally, MSPM0 offers functionality not available in STM8L and STM8S series devices such as DMA connectivity, controllable input filtering and event capabilities.
Feature | STM8S and STM8L | MSPM0C and MSPM0L |
---|---|---|
Output modes | Push-pull Open drain |
Push-pull Open drain with pulldown Hi-Z |
Input modes | Pull-up Floating Analog |
Floating Pullup or pulldown Analog |
GPIO speed selection | Speed
selection for each I/O Speed0 up to 2 MHz Speed1 up to 10 MHz |
MSPM0
offers Standard IO (SDIO) on all IO pins. MSPM0 High-Speed IO (HSIO) is available on select pins. SDIO and HSIO all up to 32 MHz @VDD ≥ 2.7V, and HSIO up to 24 MHz @VDD ≥ 1.71V |
Atomic bit set and reset | Yes | Yes |
Alternate functions | Use ODR, IDR and DDR Register | Use IOMUX |
Fast toggle | At least every two clocks | toggle pins every clock cycle |
Wake-up | External interrupts | GPIO pin state change |
GPIO controlled by DMA | No | Only available on MSPM0 |
User controlled input filtering to reject glitches less than 1, 3, or 8 ULPCLK periods | No | Only available on MSPM0 |
User controllable input hysteresis | No | Only available on MSPM0 |
GPIO Code Examples
Information about GPIO code examples can be found in the MSPM0 SDK examples guide.