SLAAEI9 December   2023 MSPM0C1103 , MSPM0C1103-Q1 , MSPM0C1104 , MSPM0C1104-Q1 , MSPM0G1105 , MSPM0G1106 , MSPM0G1107 , MSPM0G1505 , MSPM0G1506 , MSPM0G1507 , MSPM0G3105 , MSPM0G3105-Q1 , MSPM0G3106 , MSPM0G3106-Q1 , MSPM0G3107 , MSPM0G3107-Q1 , MSPM0G3505 , MSPM0G3505-Q1 , MSPM0G3506 , MSPM0G3506-Q1 , MSPM0G3507 , MSPM0G3507-Q1 , MSPM0G3519 , MSPM0L1105 , MSPM0L1106 , MSPM0L1227 , MSPM0L1228

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1MSPM0 Portfolio Overview
    1. 1.1 Introduction
    2. 1.2 Portfolio Comparison of STM8 MCUs to MSPM0 MCUs
  5. 2Ecosystem And Migration
    1. 2.1 Ecosystem Comparison
      1. 2.1.1 MSPM0 Software Development Kit (MSPM0 SDK)
      2. 2.1.2 The IDE Supported By MSPM0
      3. 2.1.3 SysConfig
      4. 2.1.4 Debug Tools
      5. 2.1.5 LaunchPad
    2. 2.2 Migration Process
      1. 2.2.1 Step 1. Choose The Right MSPM0 MCU
      2. 2.2.2 Step 2. Set Up IDE And Quick Introduction of CCS
        1. 2.2.2.1 Set Up IDE
        2. 2.2.2.2 Quick Introduction of CCS
      3. 2.2.3 Step 3. Set Up MSPM0 SDK And Quick Introduction of MSPM0 SDK
        1. 2.2.3.1 Set Up MSPM0 SDK
        2. 2.2.3.2 Quick Introduction of SDK
      4. 2.2.4 Step 4. Software Evaluation
      5. 2.2.5 Step 5. PCB Board Design
      6. 2.2.6 Step 6. Mass Production
    3. 2.3 Example
  6. 3Core Architecture Comparison
    1. 3.1 CPU
    2. 3.2 Embedded Memory Comparison
      1. 3.2.1 Flash and EEPROM Features
      2. 3.2.2 Flash and EEPROM Organization
        1. 3.2.2.1 Flash and EEPROM Regions
        2. 3.2.2.2 NONMAIN Memory of MSPM0
      3. 3.2.3 Embedded SRAM
    3. 3.3 Power UP and Reset Summary and Comparison
    4. 3.4 Clocks Summary and Comparison
      1. 3.4.1 Oscillators
      2. 3.4.2 Clock Signal Comparison
    5. 3.5 MSPM0 Operating Modes Summary and Comparison
      1. 3.5.1 Operating Modes Comparison
      2. 3.5.2 MSPM0 Capabilities in Lower Modes
      3. 3.5.3 Entering Lower-Power Modes
      4. 3.5.4 Low-Power Mode Code Examples
    6. 3.6 Interrupts and Events Comparison
      1. 3.6.1 Interrupts and Exceptions
        1. 3.6.1.1 Interrupt Management of MSPM0
        2. 3.6.1.2 Interrupt Controller (ITC) of STM8
      2. 3.6.2 Event Handler of MSPM0
      3. 3.6.3 Event Management Comparison
    7. 3.7 Debug and Programming Comparison
      1. 3.7.1 Debug Mode Comparison
      2. 3.7.2 Programming Mode Comparison
        1. 3.7.2.1 Bootstrap Loader (BSL) Programming Options
  7. 4Digital Peripheral Comparison
    1. 4.1 General-Purpose I/O (GPIO, IOMUX)
    2. 4.2 Universal Asynchronous Receiver-Transmitter (UART)
    3. 4.3 Serial Peripheral Interface (SPI)
    4. 4.4 Inter-integrated Circuit Interface (I2C)
    5. 4.5 Timers (TIMGx, TIMAx)
    6. 4.6 Windowed Watchdog Timer (WWDT)
  8. 5Analog Peripheral Comparison
    1. 5.1 Analog-to-Digital Converter (ADC)
    2. 5.2 Comparator (COMP)
    3. 5.3 Voltage References (VREF)

3.5 MSPM0 Operating Modes Summary and Comparison

MSPM0 MCUs provide five main operating modes (power modes) to allow for optimization of the device power consumption based on application requirements. In order of decreasing power, the modes are: RUN, SLEEP, STOP, STANDY, and SHUTDOWN. The CPU is active executing code in RUN mode. Peripheral interrupt events can wake the device from SLEEP, STOP, or STANDBY mode to the RUN mode. SHUTDOWN mode completely disables the internal core regulator to minimize power consumption, and wake is only possible via NRST, SWD, or a logic level match on certain IOs. RUN, SLEEP, STOP, and STANDBY modes also include several configurable policy options (for example, RUN.x) for balancing performance with power consumption.

To further balance performance and power consumption, MSPM0 devices implement two power domains: PD1 (for the CPU, memories, and high-performance peripherals), and PD0 (for low speed, low power peripherals). PD1 is always powered in RUN and SLEEP modes, but is disabled in all other modes. PD0 is always powered in RUN, SLEEP, STOP, and STANDBY modes. PD1 and PD0 are both disabled in SHUTDOWN mode.