SLAAEJ0 November   2023 AM625 , MSPM0L1306

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 SPI Transaction Dataflow
    2. 1.2 AM62x Processor
    3. 1.3 MSPM0L130x Microcontroller
  5. 2Hardware Setup
    1. 2.1 A53 Core Hardware Setup
    2. 2.2 M4F Core Hardware Setup
  6. 3Software Setup
    1. 3.1 Cloning the Beyond SDK GitHub Repository
    2. 3.2 SK-AM62x Software Setup
      1. 3.2.1 A53 Core
      2. 3.2.2 M4F Core
    3. 3.3 LP-MSPM0L130x Software Setup
  7. 4Steps for Execution
    1. 4.1 Run Project on LP-MSPM0L130x
    2. 4.2 Run Project on SK-AM62x
      1. 4.2.1 A53 Core
      2. 4.2.2 M4F Core
  8. 5Results
    1. 5.1 Single Byte Single Channel
    2. 5.2 Single Byte Multi Channel
    3. 5.3 Multi Byte Single Channel
    4. 5.4 Multi Byte Multi Channel
  9. 6Summary
  10. 7References

1.1 SPI Transaction Dataflow

We configure the ADC present on MSPM0L130x Microcontroller and establish an SPI interface with AM62x microprocessor Starter-Kit. Here, AM62x has been configured as the controller and MSPM0L130x as the peripheral. To obtain ADC data from any channel, the controller can initiate a SPI transaction with corresponding command in TX buffer. The peripheral on receiving command from controller starts transmitting the ADC data loaded into its TX buffer based on the channel requested. Controller receives the expected number of bytes from peripheral and then ends the transaction. The peripheral continuously keeps on reading and updating ADC data values. The frequency of these updates depends on the timer used to trigger the ADC. (1)

Figure 1-1 Overall Dataflow Between Controller (SK-AM62x) and Peripheral (LP-MSPM0L130x).

GUID-B5E56686-4C3E-4DAF-A2B9-2D768A74EC24-low.png

Pipelining in case Full Duplex SPI when Multi-Channel Mode is used:

In full duplex SPI mode, data is simultaneously transmitted and received over the same set of clock cycles. Hence, in the case of multi-channel ADC usage, when command is sent by controller, it simultaneously receives ADC data corresponding to its last command.

The steps involved in running this application are:

  1. Hardware setup involving connections between SK-AM62x and LP-MSPM0L130x.

  2. Software setup that includes one-time pre-execution steps.

  3. Execution of applications on both boards to enable SPI transactions.

  4. Result analysis.

  5. System performance analysis and power consumption estimation.

1.

Note: The use of “Master” and “Slave”, along with “MOSI/MISO” terminology is being considered obsolete. These terms will be replaced with “Controller” and “Peripheral”, and “PICO/POCI” respectively.