SLAU550AB January 2014 – September 2022 MSP430FR2032 , MSP430FR2033 , MSP430FR2110 , MSP430FR2111 , MSP430FR2153 , MSP430FR2155 , MSP430FR2310 , MSP430FR2311 , MSP430FR2353 , MSP430FR2355 , MSP430FR2433 , MSP430FR2532 , MSP430FR2533 , MSP430FR2632 , MSP430FR2633 , MSP430FR4131 , MSP430FR4132 , MSP430FR4133 , MSP430FR5041 , MSP430FR5043 , MSP430FR50431 , MSP430FR5847 , MSP430FR58471 , MSP430FR5848 , MSP430FR5849 , MSP430FR5857 , MSP430FR5858 , MSP430FR5859 , MSP430FR5867 , MSP430FR58671 , MSP430FR5868 , MSP430FR5869 , MSP430FR5887 , MSP430FR5888 , MSP430FR5889 , MSP430FR58891 , MSP430FR5947 , MSP430FR59471 , MSP430FR5948 , MSP430FR5949 , MSP430FR5957 , MSP430FR5958 , MSP430FR5959 , MSP430FR5967 , MSP430FR5968 , MSP430FR5969 , MSP430FR5969-SP , MSP430FR59691 , MSP430FR5986 , MSP430FR5987 , MSP430FR5988 , MSP430FR5989 , MSP430FR5989-EP , MSP430FR59891 , MSP430FR6041 , MSP430FR6043 , MSP430FR60431 , MSP430FR6877 , MSP430FR6879 , MSP430FR68791 , MSP430FR6887 , MSP430FR6888 , MSP430FR6889 , MSP430FR68891 , MSP430FR6927 , MSP430FR69271 , MSP430FR6928 , MSP430FR6972 , MSP430FR6977 , MSP430FR6979 , MSP430FR69791 , MSP430FR6987 , MSP430FR6988 , MSP430FR6989 , MSP430FR69891
The FR235x and FR215x BSL reads its configuration from the device descriptor (TLV) and additional settings from an user-configured area. The configuration data in the TLV is factory programmed and cannot be changed. Table 3-1 provides information about the peripheral modules and other data being used by the BSL. Section 3.6.1 describes the settings that can be modified by the user, including interface selection and RAM clearing. Initialization of the BSL that is based on the TLV data requires more time than other BSL versions. Initialization of the TLV-based BSL needs approximately 300 ms from the BSL entry invocation sequence until the BSL is ready to receive the first command.
Description | Address Offset | Value |
---|---|---|
BSL tag field | 00h | B5h |
BSL length field | 01h | 1Ch |
Timer base address (of the timer module used for time-out) | 02h, 03h | Per unit |
eUSCI_A base address (for UART) | 04h, 05h | Per unit |
eUSCI_B base address (for I2C) | 06h, 07h | Per unit |
Port base address (for UART pins) | 08h, 09h | Per unit |
Port SELx and pin masks (for UART) (PxSEL0, PxSEL1, RX pin mask, TX pin mask) | 0Ah, 0Bh, 0Ch, 0Dh | Per unit |
Port base address (for I2C pins) | 0Eh, 0Fh | Per unit |
Port SELx and pin masks (for I2C) (PxSEL0, PxSEL1, SDA pin mask, SCL pin mask) | 10h, 11h, 12h, 13h | Per unit |
Reserved | 14h, 15h | – |
Reserved | 16h, 17h | – |
I2C slave address | 18h | Per unit |
Tiny RAM length | 19h | Per unit |
Tiny RAM start address | 1Ah, 1Bh | Per unit |
Address of BSL user configuration data | 1Ch, 1Dh | Per unit |