SLAU929 April   2024 MSPM0C1104 , MSPM0G3505 , MSPM0G3506 , MSPM0G3507 , MSPM0L1105 , MSPM0L1227 , MSPM0L1228 , MSPM0L1228-Q1 , MSPM0L1304 , MSPM0L1305 , MSPM0L1306 , MSPM0L2227 , MSPM0L2228 , MSPM0L2228-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1MSPM0 Portfolio Overview
    1. 1.1 Introduction
    2. 1.2 Portfolio Comparison of Microchip AVR ATmega and ATiny MCUs to MSPM0
  5. 2Ecosystem and Migration
    1. 2.1 Software Ecosystem Comparison
      1. 2.1.1 MSPM0 Software Development Kit (MSPM0 SDK)
      2. 2.1.2 MPLAB X IDE vs Code Composer Studio IDE (CCS)
      3. 2.1.3 MPLAB Code Configurator vs SysConfig
    2. 2.2 Hardware Ecosystem
    3. 2.3 Debug Tools
    4. 2.4 Migration Process
    5. 2.5 Migration and Porting Example
  6. 3Core Architecture Comparison
    1. 3.1 CPU
    2. 3.2 Embedded Memory Comparison
      1. 3.2.1 Flash Features
      2. 3.2.2 Flash Organization
        1. 3.2.2.1 Memory Banks
        2. 3.2.2.2 Flash Memory Regions
        3. 3.2.2.3 NONMAIN Memory
      3. 3.2.3 Embedded SRAM
    3. 3.3 Power Up and Reset Summary and Comparison
    4. 3.4 Clocks Summary and Comparison
    5. 3.5 MSPM0 Operating Modes Summary and Comparison
      1. 3.5.1 Operating Modes Comparison
      2. 3.5.2 MSPM0 Capabilities in Lower Power Modes
      3. 3.5.3 Entering Lower-Power Modes
    6. 3.6 Interrupt and Events Comparison
      1. 3.6.1 Interrupts and Exceptions
      2. 3.6.2 Event Handler and EXTI (Extended Interrupt and Event Controller)
    7. 3.7 Debug and Programming Comparison
      1. 3.7.1 Bootstrap Loader (BSL) Programming Options
  7. 4Digital Peripheral Comparison
    1. 4.1 General-Purpose I/O (GPIO, IOMUX)
    2. 4.2 Universal Asynchronous Receiver-Transmitter (UART)
    3. 4.3 Serial Peripheral Interface (SPI)
    4. 4.4 I2C
    5. 4.5 Timers (TIMGx, TIMAx)
    6. 4.6 Windowed Watchdog Timer (WWDT)
    7. 4.7 Real-Time Clock (RTC)
  8. 5Analog Peripheral Comparison
    1. 5.1 Analog-to-Digital Converter (ADC)
    2. 5.2 Comparator (COMP)
    3. 5.3 Digital-to-Analog Converter (DAC)
    4. 5.4 Operational Amplifier (OPA)
    5. 5.5 Voltage References (VREF)
  9. 6References

3.5.1 Operating Modes Comparison

Microchip 8-bit AVR devices have similar operating modes. Table 3-10 gives a brief comparison between Microchip and MSPM0 devices.

Table 3-10 Operating Modes Comparison Between Microchip 8-bit AVR and MSPM0 Devices
Microchip ATmega Series Microchip ATtiny Series MSPM0
Mode Description Mode Description Mode Description
Run Full clocking and peripherals available Run Full clocking and peripherals available Run 0 Full clocking and peripherals available
1 SYSOSC at set frequency; CPUCLK and MCLK limit to 32kHz
2 SYSOSC disabled; CPUCLK and MCLK limit to 32kHz
Idle CPU stopped but all peripherals remain enabled Idle CPU stopped but all peripherals remain enabled Sleep
ADC noise reduction CPU disabled, only certain peripherals enabled N/A N/A N/A
Standby Same as Power Down except OSC remains enabled STANDBY CPU stopped; peripherals individually enabled Sleep 0 CPU not clocked
1 Same as Run1, but CPU not clocked
2 Same as Run2, but CPU not clocked
Stop 0 Sleep 0 + PD1 disabled
1 Sleep 1 + SYSOSC gear shifted to 4MHz
2 Sleep 2 + ULPCLK limited to 32kHz
Power Save Same as Power Down except Timer/Counter2 can be enabled Power Down BOD, WDT, and PIT (a component of the RTC) are active Standby 0 Lowest power with BOR capability; all PD0 peripherals can receive ULPCLK and LFCLK at 32kHz; RTC available with RTCCLK
1 Only TIMG0 and TIMG1 can receive ULPCLK or LFCLK at 32kHz; RTC available with RTCCLK
Power Down CPU stopped, no clocks N/A N/A Shutdown No clocks, BOR, or RTC. Core regulation off. PD1 And PD0 disabled. Exit triggers reset level BOR.