SLAU929 April   2024 MSPM0C1104 , MSPM0G3505 , MSPM0G3506 , MSPM0G3507 , MSPM0L1105 , MSPM0L1227 , MSPM0L1227-Q1 , MSPM0L1228 , MSPM0L1228-Q1 , MSPM0L1304 , MSPM0L1305 , MSPM0L1306 , MSPM0L2227 , MSPM0L2228 , MSPM0L2228-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1MSPM0 Portfolio Overview
    1. 1.1 Introduction
    2. 1.2 Portfolio Comparison of Microchip AVR ATmega and ATiny MCUs to MSPM0
  5. 2Ecosystem and Migration
    1. 2.1 Software Ecosystem Comparison
      1. 2.1.1 MSPM0 Software Development Kit (MSPM0 SDK)
      2. 2.1.2 MPLAB X IDE vs Code Composer Studio IDE (CCS)
      3. 2.1.3 MPLAB Code Configurator vs SysConfig
    2. 2.2 Hardware Ecosystem
    3. 2.3 Debug Tools
    4. 2.4 Migration Process
    5. 2.5 Migration and Porting Example
  6. 3Core Architecture Comparison
    1. 3.1 CPU
    2. 3.2 Embedded Memory Comparison
      1. 3.2.1 Flash Features
      2. 3.2.2 Flash Organization
        1. 3.2.2.1 Memory Banks
        2. 3.2.2.2 Flash Memory Regions
        3. 3.2.2.3 NONMAIN Memory
      3. 3.2.3 Embedded SRAM
    3. 3.3 Power Up and Reset Summary and Comparison
    4. 3.4 Clocks Summary and Comparison
    5. 3.5 MSPM0 Operating Modes Summary and Comparison
      1. 3.5.1 Operating Modes Comparison
      2. 3.5.2 MSPM0 Capabilities in Lower Power Modes
      3. 3.5.3 Entering Lower-Power Modes
    6. 3.6 Interrupt and Events Comparison
      1. 3.6.1 Interrupts and Exceptions
      2. 3.6.2 Event Handler and EXTI (Extended Interrupt and Event Controller)
    7. 3.7 Debug and Programming Comparison
      1. 3.7.1 Bootstrap Loader (BSL) Programming Options
  7. 4Digital Peripheral Comparison
    1. 4.1 General-Purpose I/O (GPIO, IOMUX)
    2. 4.2 Universal Asynchronous Receiver-Transmitter (UART)
    3. 4.3 Serial Peripheral Interface (SPI)
    4. 4.4 I2C
    5. 4.5 Timers (TIMGx, TIMAx)
    6. 4.6 Windowed Watchdog Timer (WWDT)
    7. 4.7 Real-Time Clock (RTC)
  8. 5Analog Peripheral Comparison
    1. 5.1 Analog-to-Digital Converter (ADC)
    2. 5.2 Comparator (COMP)
    3. 5.3 Digital-to-Analog Converter (DAC)
    4. 5.4 Operational Amplifier (OPA)
    5. 5.5 Voltage References (VREF)
  9. 6References

3.6.1 Interrupts and Exceptions

The MSPM0 and Microchip 8-bit AVRs both register and map interrupt and exception vectors depending on the device's available peripherals. A summary and comparison of the interrupt vectors for each family of devices is included in Table 3-11. A lower value of priority for an interrupt or exception is given higher precedence over interrupts with a higher priority value. For some of these vectors the priority is user-selectable, and for others it is fixed.

For both MSPM0 and Microchip 8-bit AVRs, exceptions such as NMI, reset, and hard fault handlers are given negative priority values to indicate that they always have the highest precedence over peripheral interrupts. For peripherals with selectable interrupt priorities, up to 4 programmable priority levels are available on both families of devices.

Table 3-11 Interrupt Comparison
NVIC Number MCHP MSPM0x
Interrupt/Exception Priority Interrupt/Exception Priority
- Reset Fixed: -3 Reset Fixed: -3
- NMI Handler Fixed: -2 NMI Handler Fixed: -2
- Hard Fault Handler Fixed: -1 Hard Fault Handler Fixed: -1
- SVCall Handler Selectable SVCall Handler Selectable
- PendSV Selectable PendSV Selectable
- SysTick Selectable SysTick Selectable
0 Window Watchdog Interrupt Selectable INT_GROUP0: WWDT0, DEBUGSS, FLASHCTL, WUC FSUBx, and SYSCTL Selectable
1 Power Voltage Detector Interrupt Selectable INT_GROUP1: GPIO0 and COMP0 Selectable
2 RTC and Timestamp Selectable Timer G1 (TIMG1) Selectable
3 Flash Global Interrupt Selectable UART3(1) Selectable
4 RCC Global Interrupt Selectable ADC0 Selectable
5 EXTI0 and EXTI1 interrupt Selectable ADC1(1) Selectable
6 EXTI2 and EXTI3 interrupt Selectable CANFD0(1) Selectable
7 EXTI4-EXTI15 interrupt Selectable DAC0(1) Selectable
8 UCPD1/UCPD2/USB Selectable Reserved Selectable
9 DMA1 Channel 1 Selectable SPI0 Selectable
10 DMA1 Channel 2 and 3 Selectable SPI1(1) Selectable
11 DMA1 Channel 4-6, and DMA2 Channel 1-5 Selectable Reserved Selectable
12 ADC and Comparator Selectable Reserved Selectable
13 Timer 1 (TIM1), Break, Update, Trigger, and Commutation Selectable UART1 Selectable
14 TIM1 Capture Compare Selectable UART2(1) Selectable
15 TIM2 global interrupts Selectable UART0 Selectable
16 TIM3 and TIM4 global interrupts Selectable TIMG0 Selectable
17 TIM6, LPTIM1, and DAC interrupts Selectable TIMG10(1) Selectable
18 TIM6 and LPTIM2 global interrupts Selectable TIMA0(1) Selectable
19 TIM14 global interrupts Selectable TIMA1 Selectable
20 TIM15 global interrupts Selectable TIMA2(2) Selectable
21 TIM16 and FDCAN0 global interrupts Selectable TIMH0(1) Selectable
22 TIM17 and FDCAN1 global interrupts Selectable Reserved Selectable
23 12C1 global interrupts Selectable Reserved Selectable
24 I2C2 and I2C3 global interrupts Selectable I2C0 Selectable
25 SPI1 global interrupts Selectable I2C1 Selectable
26 SPI2 and SPI3 global interrupts Selectable Reserved Selectable
27 USART1 global interrupts Selectable Reserved Selectable
28 USART2 and LPUART2 global interrupts Selectable AES(1) Selectable
29 USART 3-6 and LPUART1 global interrupts Selectable Reserved Selectable
30 CEC global interrupts Selectable RTC(1) Selectable
31 AES and RNG global interrupts Selectable DMA Selectable
(1) Only available in MSPM0G family of devices.
(2) TIMG4 on MSPM0L family of devices