2 Basic Buck Regulator Operation

The fundamental operation of buck regulators is discussed in detail in other application reports (3). While not covered in detail here, an understanding of the basic buck operational waveforms is useful for the discussions in this report. Figure 2-1 shows the basic synchronous buck power stage and the simplified waveforms of the inductor current (i_L) and switching node (v_SW) in steady state continuous-conduction mode (CCM) conditions. For simplicity, dead times and resistive components such as MOSFET on-resistances and the inductor DC resistance have not been considered in the analyses and equations in this report.

During the on time, t_ON, the high-side (HS) MOSFET is on and the low-side (LS) MOSFET is off. In this state, a positive voltage V_IN-V_OUT exists across the inductor, which causes the inductor current to ramp up. During the off-time, t_OFF, the HS MOSFET is off and LS MOSFET is on. With the switching node at ground, the voltage across the inductor is -V_OUT, which causes the inductor current to ramp back down. The switching period, t_SW, is the sum of t_ON and t_OFF and is the inverse of the switching frequency, F_SW. The duty cycle, D, can be defined as D = t_ON / t_SW. In a real buck regulator, the on and off times are dynamically set by the buck’s control loop circuitry, which then generates signals to the gate drivers that turn the power MOSFETs on and off.

Figure 2-1 Basic synchronous buck regulator and waveforms