SLUAAD6 February   2021 TPS62866 , TPS62869

 

  1.   Trademarks
  2. 1Introduction
  3. 2Thermal Vias in Power PCB design
  4. 3Layout Comparison of TPS62866
  5. 4Simulation vs. Thermal Measurement
  6. 5PCB Layout for Thermal Performance
  7. 6Summary
  8. 7References

Simulation vs. Thermal Measurement

Simulation tools allow customer to evaluate their designs before manufacturing boards and assess the best implementation of their designs. Consequently, three versions of the PCB were simulated using Keysight’s Electro-thermal tool. The simulation setup considered is for Vin-3.3 V and Vout-0.9 V at 6 A load and ambient temperature (typically 25⁰C). The thermal images of the PCBs were then captured using FLIR T335 thermal imaging camera for the same test conditions. The results are as shown below.

GUID-20210211-CA0I-SL62-WMHH-198WWQNZRGVF-low.svgFigure 4-1 Simulation vs. Measurement for E1
GUID-20210211-CA0I-LBFD-DVDW-T5TVHJPWDJMV-low.svg

In the E1 version, the simulation and measurements resulted in a highest temperature of 97⁰C and 94.7⁰C respectively on the device.

GUID-20210211-CA0I-NSHZ-FCSP-1RNDZJ2VKVT7-low.svgFigure 4-2 Simulation vs. Measurement for E2
GUID-20210211-CA0I-47WV-KKQL-T3NNN2048PNQ-low.svg

In the E2 version, the simulation and measurements resulted in a highest temperature of 107⁰C and 117⁰C respectively on the device.

GUID-20210211-CA0I-PBL3-NH5X-QLCVCF9GV1ZP-low.svgFigure 4-3 Simulation vs. Measurement for E3
GUID-20210211-CA0I-2HPH-TLCG-9BVS1SHCPMMB-low.svg

In the E3 version, the simulation and measurements resulted in a highest temperature of 97.7⁰C and 96⁰C respectively on the device.

It is then clear that the simulation results are not exactly similar to measurement results and this solely depends on the assumptions of the simulation models and the inaccuracy of real-time measurements. Nevertheless, from both the simulation and measurement, the hottest point of the PCB is on the device. It is seen that the lowest temperature is for E1 version and the highest for E2 version. The temperature of the device in E1 and E3 versions are very much comparable.

In addition to the reduction of the thermal resistance of the device, the optimization of the layout for thermals also can offer improvements in terms of efficiency. The use of thermal vias allows a better connection of the switching plane to inner layers of the design, by providing a low resistive path and consequently increases the switch node copper area. The fast swinging from the input voltage to ground at high frequency makes the switch node a critical thermal connection.

Table 4-1 shows the associated efficiency curves to the different layout implementations.

GUID-20210216-CA0I-Z8K8-4QWL-WNNPBWM0NN5Q-low.jpg Figure 4-4 Efficiency Comparison Between Layouts

The efficiency curves comparison reflects that better efficiency results can be achieved by increasing copper area at the switching node. Thus, it is important to consider wide connection at the switch node.

Table 4-1 PCB Layout Comparison Table
VIN=3.3 V/VOUT=0.9 VE1E2E3
StrategyPerformance optimizedCost optimizedPerformance and Cost
Max temperature at 6 A94.7°C117°C96°C
Peak efficiency90.75 %90.29 %90.66 %