SLUAAP2 March 2023 LMG2610 , UCC28782
Since high switching frequency operation is required to reduce the size of the system, special attention must be given to the frequency-dependent switching losses, as shown in Equation 3.
Here, it is important to note that the switching losses are linearly proportional to the switching frequency, fsw. These incurred switching losses must be mitigated through ZVS. To achieve ZVS, the energy stored in the device output capacitance ,Cp, of the low-side FET, Q1, must be discharged before Q1 is turned on. This is achieved by building a negative current, IM−, in the magnetizing inductance, LM, that is sourced from Cp immediately after Q2 is turned off. When it is time for Q1 to turn on, Cp is discharged and there are zero volts from drain to source, enabling a zero-loss turn-on transition as shown in Equation 4.
As a result, since the frequency-dependent turn-on loss is eliminated with ZVS, there is more freedom to increase the switching frequency, enabling the goal of a smaller design.