SLVAFH4 January   2023 TPS62870 , TPS62870-Q1 , TPS62871 , TPS62871-Q1 , TPS62872 , TPS62872-Q1 , TPS62873 , TPS62873-Q1 , TPS62874-Q1 , TPS62875-Q1 , TPS62876-Q1 , TPS62877-Q1 , TPSM8287A06 , TPSM8287A10 , TPSM8287A12 , TPSM8287A15

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2Configurations
  5. 3Measurements
    1. 3.1 Efficiency
    2. 3.2 Input Voltage Ripple
    3. 3.3 Output Voltage Ripple
    4. 3.4 Load Transient
    5. 3.5 Heat Distribution
  6. 4Summary

Introduction

Although it sounds simple to just use converters in parallel, there are certain important details to take care of. To avoid beat frequencies causing unpredictable input and output voltage ripple and noise, the switching frequency of the converters in a stack must be synchronized. Adding a phase shift to the synchronization is also beneficial to ensure that the converters are not switching at the same time. This process minimizes the peak input current of the converter design. The process is also beneficial if the load current always is equally shared among the converters in a stack to use each converter and its directly attached passive components to their maximum capability. This way, the stack can be designed to be most area and cost efficient. The TPS6287x devices have features implemented to properly support such configurations in a way which is easy to design with. More details can be found in the TPS6287x Data Sheet. In this application note a single stage converter design is compared to a dual stage converter design supplying the same load. Both designs are based on converters of the TPS6287x family with different output current ratings.