A power sequencing circuit is used to determine the order of powering each group. For
the KU060 FPGA, the following sequence is followed:
- Group A, POLA, POLB, and POLC
(VCORE0.95 V and MGT1.0 V), enabled when Vmain > a threshold voltage
- Group B, POLD and POLE (MGT1.2 V
and IO1.8 V), enabled when PGA is asserted, that is, POLA, POLB, and POLC have
all reached close to their nominal voltage
- Group C, POLF(IO3.3 V), enabled when PGB is asserted, that is, POLD and POLE
have both reached close to their nominal voltage
- A PGPOLx(H) signal is asserted by
the power sequencing circuit when PGC is asserted, that is, when all the POL
converters have reached and remain at close to their nominal voltages, the
PGPOLx(H) signal is asserted.