TPS2352x has two current limit thresholds as shown in Figure 5-1. This dual-level protection scheme makes sure that the part has a higher chance of riding out voltage steps and other transients due to the higher current limit at low VDS, while protecting the MOSFET during the start into short and hot-short events, by setting a lower current limit threshold for conditions with high VDS. The transition threshold is programmed with a resistor R_D that is connected from the drain of the hot-swap FET to the D pin of the TPS23521.

Based on the region of operation, the GATE source capability of TPS23521 varies. In high current limit mode for example, where VDS < VDS,SW, the GATE sourcing current is 400µA vs 20µA at high VDS region. This high GATE current helps to quickly switch ON/OF the external FET to reliably operate in hysteric mode during over-voltage conditions. Considering a peak of 75V input transient from the NEBS standard (Figure 1-2) and the requirement that the voltage to the downstream load does not exceed 62.5V, we have set the VDS,SW to be greater than 12.5V for example, 75V – 62.5V). Accordingly, resistor R_D can be selected using Equation 3.

Figure 5-1 Dual Current Limit in TPS2352x