SLVAFX0 October   2024 TLV702 , TLV703 , TLV755P , TPS74401 , TPS7A13 , TPS7A14 , TPS7A20 , TPS7A21 , TPS7A49 , TPS7A52 , TPS7A53 , TPS7A53B , TPS7A54 , TPS7A57 , TPS7A74 , TPS7A83A , TPS7A84A , TPS7A85A , TPS7A91 , TPS7A92 , TPS7A94 , TPS7A96 , TPS7H1111-SP

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction to linear regulator turn-on time
  5. 2What impacts the LDO rise time?
    1. 2.1 Simple Use Cases
      1. 2.1.1 Case 1: LDO with an NR filter but without CFF capacitance
      2. 2.1.2 Case 2: NR filter with a CFF capacitance
      3. 2.1.3 Fast-charge circuitry
      4. 2.1.4 Non-ideal LDO behavior
        1. 2.1.4.1 Applied voltage bias
        2. 2.1.4.2 Fast charge current tolerance
        3. 2.1.4.3 Internal error amplifier offset voltage
        4. 2.1.4.4 Temperature impacts the fast-charge current source
        5. 2.1.4.5 Error amplifier common mode voltage
        6. 2.1.4.6 Reference voltage (VREF) ramp time dominates the turn-on time
        7. 2.1.4.7 Start-up during dropout mode
        8. 2.1.4.8 Large values of COUT induce internal current limit
        9. 2.1.4.9 Limitations of large-signal LDO bandwidth
    2. 2.2 Specific Use Cases and Examples
      1. 2.2.1 Case 3: Precision voltage reference with RNR/SS and parallel IFC fast charge
      2. 2.2.2 Case 4: Precision voltage reference with IFC fast charge and no RNR/SS
      3. 2.2.3 Case 5: Precision current reference
      4. 2.2.4 Case 6: Soft-start timing
  6. 3System Considerations
    1. 3.1 Inrush current calculation
    2. 3.2 Inrush current analysis
    3. 3.3 Maximum slew rate
  7. 4LDO regulators referenced in this paper
  8. 5Conclusion
  9. 6References

3.1 Inrush current calculation

Use the previous sections to determine the turn-on time for your LDO regulator. Use Equation 26 to calculate the inrush current using the loading on the output of the LDO regulator. The inrush current is a function of output current, output voltage rise time and output capacitance. While quiescent current of the LDO regulator does add to the inrush current, in practice this is a very small fraction of the total inrush and can usually be neglected in the analysis.

Equation 26. I I N R U S H = I Q +   I L O A D + C O U T × V O U T ( t ) ≅ I L O A D + C O U T × V O U T ( t )

As inrush current increases the LDO regulator temperature rise can temporarily also increase. In rare cases, the internal bond wires can fuse if the inrush current is very high [16]. Fortunately, neither prove to be a major concern in modern LDO regulators in the vast majority of applications. Turn-on times for most LDO regulators are sufficiently fast such that the junction temperature does not significantly rise and place the device into thermal shutdown mode. The current limit protection circuit engages within 20µs to 50µs in most cases, preventing an abnormally high inrush current from fusing the internal bond wires. If heavy inrush exists before the current protection circuit can engage, the fusing current can be reviewed by sending an E2E request to TI. Thus, most concerns regarding inrush current are systematic in nature, such as possible brownout of input supplies, or voltage droop of the input capacitance, C­IN, due to excessive inrush current.

Figure 3-1 shows inrush current measured in three locations (A, B, and C). D describes an optional damping network.

TPS7A20, TPS7A21, TPS7A13, TPS7A14, TPS7A49, TPS7A91, TPS7A92, TLV702, TLV703, TLV755P, TPS7A52, TPS7A53, TPS7A53B, TPS7A54, TPS7A83A, TPS7A84A, TPS7A85A, TPS7A57, TPS7A94, TPS7A96, TPS7H1111-SP, TPS74401, TPS7A74, TPS74701, TPS74801, TPS74901 Inrush current probe measurement locations Figure 3-1 Inrush current probe measurement locations

Location A is a common measurement point but this may not accurately reflect the true inrush seen through the LDO regulator. The input capacitor, CIN provides some of the current to the device, so measurement point A shows less peaking in the current measurement and a lengthened current pulse.

Location B is the preferred measurement point if the objective is to capture the entire inrush current through the LDO regulator. Inductance (LP_IN) associated with the current probe measurement typically results in excessive ringing in the measurement. An optional damping network can be installed to remove most of this ringing and clean up the measurement significantly.

Location C is the least preferred inrush measurement point. Inductance (LP_OUT) associated with the current loop results in excessive ringing during the turn-on measurement, affecting both the output voltage and the input voltage measurements. Adding a damping network can improve the measurement, however the inductance may continue to slow the turn on time of the VOUT pin. Thus, even when an installed damping network exists, the measurement may not reflect true device performance when the current probe loop is removed.