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Linear & low-dropout (LDO) regulators

TPS74401

ACTIVE

3-A, low-VIN (0.8-V), low-noise, high-PSRR, adjustable ultra-low-dropout voltage regulator

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Data sheet

TPS74401

ACTIVE
Data sheet Order now

Product details

Output options Adjustable Output Iout (max) (A) 3 Vin (max) (V) 5.5 Vin (min) (V) 0.8 Vout (max) (V) 3.6 Vout (min) (V) 0.8 Rating Catalog Noise (µVrms) 13 PSRR at 100 KHz (dB) 50 Iq (typ) (mA) 3 Thermal resistance θJA (°C/W) 27 Load capacitance (min) (µF) 0 Regulated outputs (#) 1 Features Enable, Power good, Soft start Accuracy (%) 1 Dropout voltage (Vdo) (typ) (mV) 115 Operating temperature range (°C) -40 to 125
Output options Adjustable Output Iout (max) (A) 3 Vin (max) (V) 5.5 Vin (min) (V) 0.8 Vout (max) (V) 3.6 Vout (min) (V) 0.8 Rating Catalog Noise (µVrms) 13 PSRR at 100 KHz (dB) 50 Iq (typ) (mA) 3 Thermal resistance θJA (°C/W) 27 Load capacitance (min) (µF) 0 Regulated outputs (#) 1 Features Enable, Power good, Soft start Accuracy (%) 1 Dropout voltage (Vdo) (typ) (mV) 115 Operating temperature range (°C) -40 to 125
TO-263 (KTW) 7 153.924 mm² 10.1 x 15.24 VQFN (RGR) 20 12.25 mm² 3.5 x 3.5 VQFN (RGW) 20 25 mm² 5 x 5
  • Input voltage range: 1.1V to 5.5V
  • Adjustable start-up in-rush control
  • 1% accuracy over line, load, and temperature

  • VBIAS permits low VIN operation with good transient response

  • Adjustable output: 0.8V to 3.6V
  • Ultra-low dropout:
    • 115mV (typical) (legacy chip) at 3.0A
    • 120mV (typical) (new chip) at 3.0A
  • Stable with any or no output capacitor (legacy chip)

  • Stable with any output capacitor ≥2.2µF (new chip)

  • Power-good (PG) output allows supply monitoring or provides a sequencing signal for other supplies
  • Packages:
    • 5mm × 5mm × 1mm VQFN (RGW)
    • 3.5mm × 3.5mm VQFN (RGR), and DDPAK-7 (legacy chip only)
  • Input voltage range: 1.1V to 5.5V
  • Adjustable start-up in-rush control
  • 1% accuracy over line, load, and temperature

  • VBIAS permits low VIN operation with good transient response

  • Adjustable output: 0.8V to 3.6V
  • Ultra-low dropout:
    • 115mV (typical) (legacy chip) at 3.0A
    • 120mV (typical) (new chip) at 3.0A
  • Stable with any or no output capacitor (legacy chip)

  • Stable with any output capacitor ≥2.2µF (new chip)

  • Power-good (PG) output allows supply monitoring or provides a sequencing signal for other supplies
  • Packages:
    • 5mm × 5mm × 1mm VQFN (RGW)
    • 3.5mm × 3.5mm VQFN (RGR), and DDPAK-7 (legacy chip only)

The TPS74401 low-dropout (LDO) linear regulators provide an easy-to-use robust power-management option for a wide variety of applications. The user-programmable soft-start minimizes stress on the input power source by reducing capacitive inrush current on start-up. The soft-start is monotonic and designed for powering many different types of processors and application-specific integrated circuits (ASICs). The enable input and power-good output allow easy sequencing with external regulators. Complete flexibility lets the user configure a plan that meets the sequencing requirements of field-programmable gate arrays (FPGAs), digital signal processors (DSPs), and other applications with specific start-up requirements.

A precision reference and error amplifier deliver 1% accuracy over load, line, temperature, and process. The device is stable without an output capacitor (legacy chip) or with any type of capacitor ≥ 2.2µF (new chip). The device is fully specified from TJ = –40°C to 125°C.

The TPS74401 low-dropout (LDO) linear regulators provide an easy-to-use robust power-management option for a wide variety of applications. The user-programmable soft-start minimizes stress on the input power source by reducing capacitive inrush current on start-up. The soft-start is monotonic and designed for powering many different types of processors and application-specific integrated circuits (ASICs). The enable input and power-good output allow easy sequencing with external regulators. Complete flexibility lets the user configure a plan that meets the sequencing requirements of field-programmable gate arrays (FPGAs), digital signal processors (DSPs), and other applications with specific start-up requirements.

A precision reference and error amplifier deliver 1% accuracy over load, line, temperature, and process. The device is stable without an output capacitor (legacy chip) or with any type of capacitor ≥ 2.2µF (new chip). The device is fully specified from TJ = –40°C to 125°C.

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Technical documentation

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Type Title Date
* Data sheet TPS74401 3.0A, Ultra-LDO With Programmable Soft-Start datasheet (Rev. S) PDF | HTML 15 Nov 2024
White paper Demystifying LDO Turn-On (startup) Time PDF | HTML 05 Oct 2024
Application note LDO Noise Demystified (Rev. B) PDF | HTML 18 Aug 2020
Application note Using Thermal Calculation Tools for Analog Components (Rev. A) 30 Aug 2019
Application note A Topical Index of TI LDO Application Notes (Rev. F) 27 Jun 2019
Selection guide Low Dropout Regulators Quick Reference Guide (Rev. P) 21 Mar 2018
Application note LDO PSRR Measurement Simplified (Rev. A) PDF | HTML 09 Aug 2017
Analog Design Journal 4Q 2012 Issue Analog Applications Journal 25 Sep 2012
Analog Design Journal LDO noise examined in detail 25 Sep 2012
Application note Power Solution Using Discrete DC/DC Converters and LDOs (Rev. B) 26 Aug 2010
Application note Power Ref Design for TMS320C6472, 12-Vin Digital Pwr Cntrlrs, and LDOs (Rev. A) 24 May 2010
Application note Pwr Ref Design f/'C6472 12-Vin Digital Pwr Controllers and LDOs 28 Apr 2010
Application note 'C6472 12Vin Flexible Pwr Design Using DCDC Controllers and LDOs (8x C6472) 26 Mar 2010
Application note Using New Thermal Metrics 15 Dec 2009
Analog Design Journal A 3-A, 1.2-Vout linear regulator with 80% efficiency and Plost < 1W 10 Oct 2006
EVM User's guide TPS74x01EVM-118 User's Guide 20 Jun 2006

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

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User guide: PDF
Not available on TI.com
Evaluation board

TPS74401EVM-118 — TPS74401 Evaluation Module

The TPS74401EVM-118 evaluation module (EVM) is designed to help the user easily evaluate and test the operation and functionality of the TPS74401 LDO linear regulator. The EVM uses the TPS74401, 3 A linear regulator with programmable soft-start and integrated power good (PG). Refer to (...)

User guide: PDF
Not available on TI.com
Simulation model

TPS74401 PSpice Transient Model (Rev. B)

SLIM008B.ZIP (63 KB) - PSpice Model
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Simulation model

TPS74401 TINA-TI DC Reference Design

SLIM010.TSC (120 KB) - TINA-TI Reference Design
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Simulation model

TPS74401 TINA-TI Transient Reference Design

SLIM009.TSC (89 KB) - TINA-TI Reference Design
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Simulation model

TPS74401 TINA-TI Transient Spice Model

SLIM011.ZIP (35 KB) - TINA-TI Spice Model
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Simulation model

TPS74401 Unencrypted PSpice Transient Model

SBVM619.ZIP (3 KB) - PSpice Model
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Schematic

5Vin Solution with 1.5-A Core Supply (Rev. A)

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Schematic

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Schematic

PMP5149 1

SLVR354.PDF (150 KB)
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Schematic

PMP5149 2

SLVR355.PDF (141 KB)
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Schematic

PMP5149 3

SLVR356.PDF (193 KB)
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Reference designs

TIDA-00270 — Current-Sharing Dual LDOs

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Design guide: PDF
Schematic: PDF
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Schematic: PDF
Package Pins CAD symbols, footprints & 3D models
TO-263 (KTW) 7 Ultra Librarian
VQFN (RGR) 20 Ultra Librarian
VQFN (RGW) 20 Ultra Librarian
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