SLVUCJ9 February   2023 LP8764-Q1 , TPS6594-Q1

 

  1.   PDN-0A User's Guide for Powering J7AEP with the TPS6594-Q1 and LP8764-Q1 PMICs
  2.   Trademarks
  3. 1Introduction
  4. 2Device Versions
  5. 3Processor Connections
    1. 3.1 Power Mapping
    2. 3.2 Control Mapping
  6. 4Supporting Functional Safety Systems
    1. 4.1 Achieving ASIL-B System Requirements
    2. 4.2 Achieving up to ASIL-D System Requirements
  7. 5Static NVM Settings
    1. 5.1  Application-Based Configuration Settings
    2. 5.2  Device Identification Settings
    3. 5.3  BUCK Settings
    4. 5.4  LDO Settings
    5. 5.5  VCCA Settings
    6. 5.6  GPIO Settings
    7. 5.7  Finite State Machine (FSM) Settings
    8. 5.8  Interrupt Settings
    9. 5.9  POWERGOOD Settings
    10. 5.10 Miscellaneous Settings
    11. 5.11 Interface Settings
    12. 5.12 Multi-Device Settings
    13. 5.13 Watchdog Settings
  8. 6Pre-Configurable Finite State Machine (PFSM) Settings
    1. 6.1 Configured States
    2. 6.2 PFSM Triggers
    3. 6.3 Power Sequences
      1. 6.3.1 TO_SAFE_SEVERE and TO_SAFE
      2. 6.3.2 TO_SAFE_ORDERLY and TO_STANDBY
      3. 6.3.3 ACTIVE_TO_WARM
      4. 6.3.4 ESM_SOC_ERROR
      5. 6.3.5 PWR_SOC_ERROR
      6. 6.3.6 MCU_TO_WARM
      7. 6.3.7 TO_MCU
      8. 6.3.8 TO_ACTIVE
      9. 6.3.9 TO_RETENTION
  9. 7Application Examples
    1. 7.1 Moving Between States; ACTIVE and RETENTION
      1. 7.1.1 ACTIVE
      2. 7.1.2 MCU ONLY
      3. 7.1.3 RETENTION
    2. 7.2 Entering and Exiting Standby
    3. 7.3 Entering and Exiting LP_STANDBY
    4. 7.4 Runtime Customization
  10. 8References

6.3.1 TO_SAFE_SEVERE and TO_SAFE

The TO_SAFE_SEVERE and TO_SAFE are distinct sequences that occur before transitioning to the SAFE state. Both sequences shut down all rails without delay and force EN_DRV low. The TO_SAFE_SEVERE sequence immediately ceases BUCK switching and enables the pulldown resistors of the BUCKs and LDOs. The pulldown is enabled to prevent any damage of the PMICs in case of over voltage on VCCA or thermal shutdown. The timing is illustrated in #GUID-3104D04F-00BD-42FA-BBBC-82286F5B3F06. The TO_SAFE sequence does not reset the BUCK regulators until after the regulators are turned off.

Figure 6-2 TO_SAFE_SEVERE and TO_SAFE Power Sequences

Note: TO_SAFE_SEVERE and TO_SAFE Power Sequences

After the power sequence shown in #GUID-3104D04F-00BD-42FA-BBBC-82286F5B3F06, the TO_SAFE sequence executes the following instructions:

//TPS65941120 and TPS65941421
// Clear AMUXOUT_EN, CLKMON_EN, set LPM_EN
REG_WRITE_MASK_IMM ADDR=0x81 DATA=0x04 MASK=0xE3
// Reset all BUCK regulators
REG_WRITE_MASK_IMM ADDR=0x87 DATA=0x1F MASK=0xE0
//PL876411B5
//Reset all BUCK regulators
REG_WRITE_MASK_IMM ADDR=0x87 DATA=0x0F MASK=0xF0

The resetting of the BUCK regulators is done in preparation to transitioning to the SAFE_RECOVERY state. SAFE_RECOVERY means that the PMIC leaves the mission state. The SAFE_RECOVERY state is where the recovery mechanism increments the recovery counter and determines if the recovery count threshold (see Table 5-10) is reached before attempting to recover.

The TO_SAFE_SEVERE sequence executes the following instruction after the power sequence:


// TPS65941120 and TPS65941421
// Clear AMUXOUT_EN, CLKMON_EN, set LPM_EN
REG_WRITE_MASK_IMM ADDR=0x81 DATA=0x04 MASK=0xE3
The TPS65941120 has an additional delay of 500 ms at the end of the TO_SAFE_SEVERE sequence. It is important to note that the recovery is not attempted until after the sequence delay is complete.