SLWU086C November 2013 – January 2016 ADS42JB46 , ADS42JB49 , ADS42JB69 , DAC38J84
Eight status LEDs on the TSW14J56EVM indicate the status of the FPGA, DDR3, and JESD204B interface:
D1 – Indicates DAC EVM established SYNC with the TSW14J56 device when off
D2 – Indicates presence of device clock from DAC EVM when blinking
D3 – Indicates ADC EVM established SYNC with the TSW14J56 device when off
D4 – Indicates presence of device clock from ADC EVM when blinking
D5 – Not used
D6 – DDR3 initialization and calibration complete when off
D7 – DDR3 ready when off
D8 – DDR3 pass calibration and initialization if on