As data converters continue evolving, it’s a challenge to meet multiband requirements in systems such as software-defined radios, wireless testers and spectrum analyzers. System designers are reevaluating traditional frequency-hopping methods as devices become more complex and capable of faster transitions between numerically controlled oscillator (NCO) frequencies.
In this article, I’ll explore the evolution of frequency-hopping techniques, comparing traditional and advanced methods such as general-purpose input/output (GPIO) and fast reconfiguration interface (FRI). Understanding these advancements can help you gain valuable insights into optimizing frequency hopping for both single- and multiband applications. But to fully grasp how modern systems meet multiband requirements, it’s essential to first understand the fundamentals of frequency hopping.
In modern communication systems, such as Wi-Fi® 6 and 7 or quadrature amplitude modulation (QAM)-encoded signals, the spectrum is inherently multiband, meaning that the radio-frequency (RF) domain consists of multiple channels within each frequency band. For instance, Wi-Fi 6 and 7 operate across several channels within the same frequency band to dynamically maximize bandwidth and data throughput, while QAM involves encoding data into different phase offsets and amplitude levels within a single channel. Figure 1 shows an example frequency band containing 7 QAM channels.
Direct RF-sampling analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) incorporate many digital features. One of the most important features enabling direct RF sampling is the digital downconverter (DDC) in ADCs and the digital upconverter (DUC) in DACs.
In an ADC, the DDC consists of three main components: an NCO, digital mixer and decimator block. The NCO serves as the digital counterpart of the local oscillator in traditional receiver signal chains and mixes with the input signal to provide a signal in baseband (Nyquist zone 1), along with unwanted images. The decimator block filters out the images through a finite impulse response (FIR) decimation filter and then reduces the signal bandwidth by downsampling. The decimator block is the digital equivalent of an intermediate frequency (IF) filter.
In a DAC, the DUC comprises an interpolator, an NCO and a digital mixer. The interpolator, unlike in an ADC, upsamples the lower-bandwidth input signal and then passes it through a FIR filter to suppress images. After the interpolator stage, the output signal feeds into a digital mixer to mix with the NCO, allowing the DAC to operate over a wide Nyquist zone with a lower input signal bandwidth.
The number of DDCs active on any given input of an RF sampling converter determines whether a converter operates in single- or multiband output. This article’s focus will be on the ADC aspect of frequency hopping.
Figure 2 shows an example of the DDC from the Texas Instruments (TI) ADC32RF55, an RF-sampling ADC capable of dual-channel, quad-band operation at 3GSPS.
Often, the frequency band of interest may change: Instead of switching an entirely unique signal chain for each band, the same RF sampling converter can simply adjust the NCO frequency to match the new frequency band. This is a major advantage of modern RF-sampling converters. The act of changing the NCO from one frequency to a different frequency is what is known as frequency hopping.
The NCO does not produce an analog frequency directly; instead, it generates a digital representation of the desired frequency with high resolution. Each NCO receives a digital word – typically 48 bit or higher – which when combined with an NCO phase accumulator can represent a signal suitable for the digital mixing stage. When programming an NCO, the digital representation corresponding to the desired IF is what gets programmed, not an actual frequency. The NCO frequency range is most commonly supported between –Fs/2 and Fs/2, where Fs represents the converter’s sampling frequency. Negative frequency words are used for even Nyquist zones, while positive frequency words are used for signals in odd Nyquist zones.
To determine where a higher-order NCO frequency falls into baseband, your first task is to perform a modulus operation between the intended frequency and the sample rate to remove any multiple of Fs. The intended NCO frequency is now between 0Hz and the converter sample rate, Fs.
If the NCO frequency is less than the Nyquist frequency (Fs/2), then the intended NCO frequency translates to an odd Nyquist zone, as shown in Equation 1:
If the calculated NCO frequency is above the Nyquist frequency, then the frequency lands in an even Nyquist zone, as shown in Equation 2:
Figure 3 shows how a fundamental signal (Fund.) and its second-, third- and fourth-order harmonics (HD2, HD3 and HD4) will fold back into the first Nyquist zone, despite the actual frequency component landing in higher-order Nyquist zones.
One advantage of RF-sampling ADCs over traditional ADCs is that the hardware does not need to change in order to switch frequency bands. This inherent flexibility allows RF-sampling ADCs to quickly adapt to new frequency bands without requiring additional hardware components, simplifying system design and reducing costs. This process is not instantaneous, however. In early designs of RF-sampling ADCs, only a single NCO word option was available for each NCO and subsequent DDC. As a result, hopping to another frequency required multiple register-write operations.
The new NCO word must be written through the Serial Peripheral Interface (SPI), followed by another register write to push the new NCO word into the DDC block, where it actually takes effect. Several factors influence the time required to hop frequencies, including the length of the NCO word and the SPI transaction speed. Often, the register size of ADCs is limited to 8 bits, so you will need a total of seven register writes to update a 48-bit NCO: six register writes for the NCO word itself and one additional register write to update the DDC.
After considering the overhead for each SPI transaction (typically a 16-bit address for each register write), the transaction time triples. Assuming a 20MHz serial clock signal (SCLK) rate, Equation 3 calculates the time to frequency hop, assuming a nonstop stream of SPI data:
RF converters are now designed with multiple NCO words per DDC, allowing preprogramming of NCO words. This innovative approach enables faster frequency hopping by preloading several frequency values into the converter’s memory. This concept of storing precalculated NCO words is where the “fast” in fast frequency hopping comes from.
Figure 4 shows the 48-bit NCO register addresses by NCO index and word index for the ADC32RF55. Despite the addresses being the same for channel A and B, the frequency words are unique, as this device implements register map paging, which masks registers not included on the active page from any read and write operations.
Now that the words are programmed, how do you actually select a specific one? Changing the NCO word simply requires selecting a new NCO word for the DDC, which you can do through SPI or GPIO pins. Table 1 shows an example of how to select an individual word for the specified DDC in the ADC32RF55, depending on the number of active bands. In a standard configuration, this ADC has four unique NCO words per DDC; however, in single-band modes, the neighboring DDC’s four NCO words can supply the active NCO as well, meaning that each channel’s DDC has access to eight preprogrammed NCO words.
# of bands | ADDR | D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
---|---|---|---|---|---|---|---|---|---|
Single | 0x3B | 0 | 0 | 0 | 0 | NCO2 CHA[1:0] | 0 | NCO1 CHA[1:0] | |
0x41 | 0 | 0 | 0 | 0 | NCO2 CHB[1:0] | 0 | NCO1 CHB[1:0] | ||
Dual | 0x3B | 0 | 0 | 0 | 0 | NCO2 CHA[1:0] | NCO1 CHA[1:0] | ||
0x41 | 0 | 0 | 0 | 0 | NCO2 CHB[1:0] | NCO1 CHB[1:0] | |||
Quad | 0x3B | NCO4 CHA[1:0] | NCO3 CHA[1:0] | NCO2 CHA[1:0] | NCO1 CHA[1:0] | ||||
0x41 | NCO4 CHB[1:0] | NCO3 CHB[1:0] | NCO2 CHB[1:0] | NCO1 CHB[1:0] |
The time required to perform a frequency hop varies by converter. Typically, the SPI method requires the duration of just a single SPI transaction, instead of seven as in Equation 3. The speed of the SPI method is further limited by the maximum clock rate of the SPI and the overhead involved with serial data transmission. Assuming the same 20MHz SCLK, Equation 4 shows the time required before the device initiates an NCO word change:
In contrast, the GPIO method can be as fast as the GPIO inputs can be updated. Once the voltage crosses its high- or low-level thresholds, the NCO word change begins.
In either method, once the device receives the NCO word change, the internal NCO word updates instantly; however, the decimation filter has to flush out all old values, so there is some added delay as a result based on the decimation factor.
Table 2 shows the time required by the ADC32RF55 to flush its decimation filter with data from mixing with the new NCO frequency.
Decimation setting | NCO switching time |
---|---|
/4 | ~250ns |
/8 | ~350ns |
/16 | ~600ns |
/32 | ~1μs |
/64 | ~2μs |
/128 | ~4μs |
Generally, the GPIO approach will be faster than an SPI approach for frequency hopping because of the inherent parallel aspect of a GPIO interface vs. a serial interface. However, there is one consideration: In GPIO word-selection mode, the same word index will apply to all active DDCs. The device cannot use word 1 on DDC1 while using word 3 on DDC2; the GPIO interface will set all DDCs to the same word index.
Another method, FRI, involves sending data over specific device pins at a much faster rate than what standard SPI supports. Some devices, such as the TI DAC39RF12, can support FRI communication up to 200MHz, which you can use for selecting the active NCO word.