SLYY193C january   2023  – april 2023 LMQ61460-Q1 , TPS54319 , TPS62088 , TPS82671 , UCC12040 , UCC12050

 

  1.   At a glance
  2.   Authors
  3.   3
  4.   What is power density?
  5.   What limits power density?
  6.   What limits power density: switching losses
  7.   Key limiting factor No. 1: charge-related losses
  8.   Key limiting factor No. 2: reverse-recovery losses
  9.   Key limiting factor No. 3: turn-on and turn-off losses
  10.   What limits power density: thermal performance
  11.   How to break through power density barriers
  12.   Switching loss innovations
  13.   Package thermal innovations
  14.   Advanced circuit design innovations
  15.   Integration innovations
  16.   Conclusion
  17.   Additional resources

What limits power density: switching losses

Although increasing the switching frequency can increase the power density, there is a reason why power converters today typically switch no higher than the megahertz range. Increasing the switching frequency comes with the undesired side effect of also causing increased switching losses and an associated temperature rise. This is largely caused by a few dominant switching losses.

To understand these switching losses, it is important to first introduce some industry nomenclature. In semiconductor devices, the amount of charge associated with that device is typically related to the on-state resistance. A lower resistance results in higher gate charge and parasitic capacitance. This trade-off of resistance and charge is often quantified by the RQ FoM, defined as a device on-resistance multiplied by the total charge that must be supplied to the terminal in order to switch the device at an operating voltage. In addition, the amount of area a device occupies to achieve a target resistance is often referred to as resistance times area (Rsp). You can reduce conduction losses by reducing the metal-oxide semiconductor field-effect transistor (MOSFET) on-state resistance (RDS(on)). However, reducing the on-state resistance also causes the device switching-related losses to go up, and increase the overall die area and cost.

Depending on the implementation and application, the impact of different switching losses on the overall power loss can vary. For more details about each type of loss, see the application note Power Loss Calculation with Common Source Inductance Consideration for Synchronous Buck Converters. For the purposes of this paper, we consider a buck converter example and highlight the key limiting factors associated with each loss component.