SLYY193C january   2023  – april 2023 LMQ61460-Q1 , TPS54319 , TPS62088 , TPS82671 , UCC12040 , UCC12050

 

  1.   At a glance
  2.   Authors
  3.   3
  4.   What is power density?
  5.   What limits power density?
  6.   What limits power density: switching losses
  7.   Key limiting factor No. 1: charge-related losses
  8.   Key limiting factor No. 2: reverse-recovery losses
  9.   Key limiting factor No. 3: turn-on and turn-off losses
  10.   What limits power density: thermal performance
  11.   How to break through power density barriers
  12.   Switching loss innovations
  13.   Package thermal innovations
  14.   Advanced circuit design innovations
  15.   Integration innovations
  16.   Conclusion
  17.   Additional resources

Switching loss innovations

Investments in semiconductor technology are clearly necessary in order to achieve excellent device performance and FoMs. This can include innovations to improve existing technologies or the development of new materials with fundamentally better performance, such as gallium nitride (GaN) technology for higher-voltage switching applications.

Figure 7 compares a 3.3-V to 1.8-V buck converter using different power process technologies from Texas Instruments (TI). The TPS54319 uses TI’s previous power process node, while the TPS62088 uses TI’s latest power process node with lower RQ FoMs. As the efficiency curve shows, the TPS62088 is able to switch at 4 MHz compared to the TPS54319 switching at 2 MHz while maintaining virtually the same efficiency. This can halve the size of the external inductor. In addition, because TI’s new power process node also enables significant RSP reduction, the overall package size drops from 4 mm2 to 0.96 mm2. Although this size reduction is very attractive from a power density perspective, it also introduces challenges with respect to temperature rise, which we will address in an upcoming section.

The TPS54319 switches at 2 MHz and is using TI’s previous power process node, while the TPS62088 switches at 4 MHz using TI’s newest power process with improved switching FoMs

GUID-20220826-SS0I-VQ5J-DJCT-BFGNVZWQZ3ZB-low.svg Figure 7 Comparison of DC/DC efficiency for a 3.3-V to 1.8-V buck converter.

GaN’s unique combination of zero reverse recovery, low output charge and high slew rate enable new totem-pole topologies such as bridgeless power factor correction. These topologies have higher efficiency and power density that silicon MOSFETs cannot achieve. Figure 8 compares of TI GaN technology at 600 V compared to some of the industry’s best silicon carbide (SiC) and superjunction silicon devices. TI GaN technology offers substantially lower losses and thus enables higher frequency.

GUID-20220826-SS0I-RDGR-P0MC-8ZRDFLHNPFKW-low.svg
VIN = 400 V TJ = 110°C
IIN = 10 A
Figure 8 Switching energy losses comparison.