SNAA411 September   2024 CDCLVC1102 , CDCLVC1103 , CDCLVC1104 , CDCLVC1110 , CDCLVD1204 , LMK00301 , LMK00304 , LMK00306 , LMK00308 , LMK01801 , LMK04832 , LMK1C1102 , LMK1C1103 , LMK1C1104 , LMK1C1106 , LMK1C1108 , LMK1D1204 , LMK1D1208 , LMX2485 , LMX2491 , LMX2572 , LMX2592 , LMX2594 , LMX2595 , LMX2820

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Generic Clock Tree
  5. 2Sine Wave Slew Rate Requirement
  6. 3Current Approach vs Clock Buffer
  7. 4Clock Buffer Implementation
    1. 4.1 Clock Buffer Common Input Stages
    2. 4.2 Choosing Between Internal or External DC Bias
    3. 4.3 Single Ended or LVCMOS Signal
    4. 4.4 Differential Inputs
  8. 5Performance Improvements, Results With Clock Buffer
    1. 5.1 FSWP Phase Noise Analyzer Measurements Case
    2. 5.2 TI LMX2820 Noise Improvements With Sine to Square Wave Clock Buffer
      1. 5.2.1 LMX2820 Phase Noise and RMS Jitter Results Summary
  9. 6Sine to Square Wave Clock Buffer Comparison
    1. 6.1 LMK1C110x Additive Noise vs Others
  10. 7Summary
  11. 8References

5.1 FSWP Phase Noise Analyzer Measurements Case

When dealing at lower frequency, phase noise using low noise clock buffer (LMK1C110x) shows better performance than the source input at lower frequencies from SMA100B on the FSWP phase noise analyzer as shown in Figure 5-2. This shows that slew rate sensitivity is impacting the internal circuitry of the FSWP at lower frequencies and the source measurement comes out to be pessimistic. When the same input from SMA100B at lower frequencies is buffered through LMK1C110x shows better results at lower offsets frequencies. Similar concept applies to all the PLL based synthesizer device which are slew rate sensitive.

LMK1C110x 10MHz Output Phase Noise Gap Between Source and Buffer Figure 5-1 LMK1C110x 10MHz Output Phase Noise Gap Between Source and Buffer

At higher frequencies the gap between source noise measurement and buffer measurement reduces on the FSWP since better slew rate is helping the measurement instrument at higher frequencies as shown in Figure 5-2. Adding a low noise buffer still helps improve the buffer noise performance specifically at lower input amplitudes but at some point addition of clock buffer is not going to help at all because of higher slew rates. Since most of the systems where close in phase noise is important start at lower frequencies, addition of buffer significantly improves the margins.

LMK1C110x 100MHz Output Phase Noise Gap Between Source and Buffer Figure 5-2 LMK1C110x 100MHz Output Phase Noise Gap Between Source and Buffer

Synthesizer devices like LMX2820 running at higher frequencies have a wide input frequency range, input stage is usually optimized for higher frequencies. Phase noise degradation is pronounced when using a 10MHz input source or other lower frequencies. At 100MHz since the slew rate is much higher performance degradation is not significant but there is still some improvement specifically at lower input power levels when using the low noise sine to square wave conversion buffers.