Product details

Integrated VCO Yes Output frequency (min) (MHz) 10 Output frequency (max) (MHz) 15000 Normalized PLL phase noise (dBc/Hz) -236 Current consumption (mA) 340 Features Flexible ramp generation, Integer-boundary spurs (IBS) removal, Integrated VCO, JESD204B SYSREF, Multi-device sync, Phase adjustment, Wideband 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -129 Rating Catalog Operating temperature range (°C) -40 to 85 Lock time (µs) (typ) Loop BW dependent
Integrated VCO Yes Output frequency (min) (MHz) 10 Output frequency (max) (MHz) 15000 Normalized PLL phase noise (dBc/Hz) -236 Current consumption (mA) 340 Features Flexible ramp generation, Integer-boundary spurs (IBS) removal, Integrated VCO, JESD204B SYSREF, Multi-device sync, Phase adjustment, Wideband 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -129 Rating Catalog Operating temperature range (°C) -40 to 85 Lock time (µs) (typ) Loop BW dependent
VQFN (RHA) 40 36 mm² 6 x 6
  • 10-MHz to 15-GHz output frequency
  • –110 dBc/Hz phase noise at 100-kHz offset with 15-GHz carrier
  • 45-fs rms jitter at 7.5 GHz (100 Hz to 100 MHz)
  • Programmable output power
  • PLL key specifications
    • Figure of merit: –236 dBc/Hz
    • Normalized 1/f noise: –129 dBc/Hz
    • High phase detector frequency
      • 400-MHz integer mode
      • 300-MHz fractional mode
    • 32-bit fractional-N divider
  • Remove integer boundary spurs with programmable input multiplier
  • Synchronization of output phase across multiple devices
  • Support for SYSREF with 9-ps resolution programmable delay
  • Frequency ramp and chirp generation ability for FMCW applications
  • < 20-µs VCO calibration speed
  • 3.3-V single power supply operation
  • 10-MHz to 15-GHz output frequency
  • –110 dBc/Hz phase noise at 100-kHz offset with 15-GHz carrier
  • 45-fs rms jitter at 7.5 GHz (100 Hz to 100 MHz)
  • Programmable output power
  • PLL key specifications
    • Figure of merit: –236 dBc/Hz
    • Normalized 1/f noise: –129 dBc/Hz
    • High phase detector frequency
      • 400-MHz integer mode
      • 300-MHz fractional mode
    • 32-bit fractional-N divider
  • Remove integer boundary spurs with programmable input multiplier
  • Synchronization of output phase across multiple devices
  • Support for SYSREF with 9-ps resolution programmable delay
  • Frequency ramp and chirp generation ability for FMCW applications
  • < 20-µs VCO calibration speed
  • 3.3-V single power supply operation

The LMX2594 is a high-performance, wideband synthesizer that can generate any frequency from 10 MHz to 15 GHz without using an internal doubler, thus eliminating the need for sub-harmonic filters. The high-performance PLL with figure of merit of –236 dBc/Hz and high-phase detector frequency can attain very low in-band noise and integrated jitter. The high-speed N-divider has no pre-divider, thus significantly reducing the amplitude and number of spurs. There is also a programmable input multiplier to mitigate integer boundary spurs.

The LMX2594 allows users to synchronize the output of multiple devices and also enables applications that need deterministic delay between input and output. A frequency ramp generator can synthesize up to two segments of ramp in an automatic ramp generation option or a manual option for maximum flexibility. The fast calibration algorithm allows changing frequencies faster than 20 µs. The LMX2594 adds support for generating or repeating SYSREF (compliant to JESD204B standard) designed for low-noise clock sources in high-speed data converters. A fine delay adjustment (9-ps resolution) is provided in this configuration to account for delay differences of board traces.

The output drivers within LMX2594 deliver output power as high as 7 dBm at 15-GHz carrier frequency. The device runs from a single 3.3-V supply and has integrated LDOs that eliminate the need for on-board low noise LDOs.

The LMX2594 is a high-performance, wideband synthesizer that can generate any frequency from 10 MHz to 15 GHz without using an internal doubler, thus eliminating the need for sub-harmonic filters. The high-performance PLL with figure of merit of –236 dBc/Hz and high-phase detector frequency can attain very low in-band noise and integrated jitter. The high-speed N-divider has no pre-divider, thus significantly reducing the amplitude and number of spurs. There is also a programmable input multiplier to mitigate integer boundary spurs.

The LMX2594 allows users to synchronize the output of multiple devices and also enables applications that need deterministic delay between input and output. A frequency ramp generator can synthesize up to two segments of ramp in an automatic ramp generation option or a manual option for maximum flexibility. The fast calibration algorithm allows changing frequencies faster than 20 µs. The LMX2594 adds support for generating or repeating SYSREF (compliant to JESD204B standard) designed for low-noise clock sources in high-speed data converters. A fine delay adjustment (9-ps resolution) is provided in this configuration to account for delay differences of board traces.

The output drivers within LMX2594 deliver output power as high as 7 dBm at 15-GHz carrier frequency. The device runs from a single 3.3-V supply and has integrated LDOs that eliminate the need for on-board low noise LDOs.

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