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CDCLVD1208

ACTIVE

Low jitter, 2-input selectable 1:8 universal-to-LVDS buffer

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Data sheet

CDCLVD1208

ACTIVE
Data sheet Order now

Product details

Function Differential Additive RMS jitter (typ) (fs) 171 Output frequency (max) (MHz) 800 Number of outputs 8 Output supply voltage (V) 2.5 Core supply voltage (V) 2.5 Output skew (ps) 45 Features 2:8 fanout, Universal inputs Operating temperature range (°C) -40 to 85 Rating Catalog Output type LVDS Input type LVCMOS, LVDS, LVPECL
Function Differential Additive RMS jitter (typ) (fs) 171 Output frequency (max) (MHz) 800 Number of outputs 8 Output supply voltage (V) 2.5 Core supply voltage (V) 2.5 Output skew (ps) 45 Features 2:8 fanout, Universal inputs Operating temperature range (°C) -40 to 85 Rating Catalog Output type LVDS Input type LVCMOS, LVDS, LVPECL
VQFN (RHD) 28 25 mm² 5 x 5
  • 2:8 Differential Buffer
  • Low Additive Jitter: < 300-fs RMS in 10-kHz to 20-MHz
  • Low Output Skew of 45 ps (Maximum)
  • Universal Inputs Accept LVDS, LVPECL, and LVCMOS
  • Selectable Clock Inputs Through Control Pin
  • 8 LVDS Outputs, ANSI EIA/TIA-644A Standard Compatible
  • Clock Frequency: Up to 800 MHz
  • Device Power Supply: 2.375 V to 2.625 V
  • LVDS Reference Voltage, VAC_REF, Available for Capacitive Coupled Inputs
  • Industrial Temperature Range: –40°C to 85°C
  • Packaged in 5-mm × 5-mm, 28-Pin VQFN (RHD)
  • ESD Protection Exceeds 3-kV HBM, 1-kV CDM
  • APPLICATIONS
    • Telecommunications and Networking
    • Medical Imaging
    • Test and Measurement Equipment
    • Wireless Communications
    • General-Purpose Clocking

All other trademarks are the property of their respective owners
  • 2:8 Differential Buffer
  • Low Additive Jitter: < 300-fs RMS in 10-kHz to 20-MHz
  • Low Output Skew of 45 ps (Maximum)
  • Universal Inputs Accept LVDS, LVPECL, and LVCMOS
  • Selectable Clock Inputs Through Control Pin
  • 8 LVDS Outputs, ANSI EIA/TIA-644A Standard Compatible
  • Clock Frequency: Up to 800 MHz
  • Device Power Supply: 2.375 V to 2.625 V
  • LVDS Reference Voltage, VAC_REF, Available for Capacitive Coupled Inputs
  • Industrial Temperature Range: –40°C to 85°C
  • Packaged in 5-mm × 5-mm, 28-Pin VQFN (RHD)
  • ESD Protection Exceeds 3-kV HBM, 1-kV CDM
  • APPLICATIONS
    • Telecommunications and Networking
    • Medical Imaging
    • Test and Measurement Equipment
    • Wireless Communications
    • General-Purpose Clocking

All other trademarks are the property of their respective owners

The CDCLVD1208 clock buffer distributes one of two selectable clock inputs (IN0 and IN1) to 8 pairs of differential LVDS clock outputs (OUT0 through OUT7) with minimum skew for clock distribution. The CDCLVD1208 can accept two clock sources into an input multiplexer. The inputs can either be LVDS, LVPECL, or LVCMOS.

The CDCLVD1208 is specifically designed for driving 50-Ω transmission lines. In case of driving the inputs in single-ended mode, the appropriate bias voltage, VAC_REF, must be applied to the unused negative input pin.

The IN_SEL pin selects the input which is routed to the outputs. If this pin is left open, it disables the outputs (static). The part supports a fail-safe function. The device incorporates an input hysteresis which prevents random oscillation of the outputs in the absence of an input signal.

The device operates in 2.5-V supply environment and is characterized from –40°C to 85°C (ambient temperature). The CDCLVD1208 is packaged in small, 28-pin, 5-mm × 5-mm VQFN package.

The CDCLVD1208 clock buffer distributes one of two selectable clock inputs (IN0 and IN1) to 8 pairs of differential LVDS clock outputs (OUT0 through OUT7) with minimum skew for clock distribution. The CDCLVD1208 can accept two clock sources into an input multiplexer. The inputs can either be LVDS, LVPECL, or LVCMOS.

The CDCLVD1208 is specifically designed for driving 50-Ω transmission lines. In case of driving the inputs in single-ended mode, the appropriate bias voltage, VAC_REF, must be applied to the unused negative input pin.

The IN_SEL pin selects the input which is routed to the outputs. If this pin is left open, it disables the outputs (static). The part supports a fail-safe function. The device incorporates an input hysteresis which prevents random oscillation of the outputs in the absence of an input signal.

The device operates in 2.5-V supply environment and is characterized from –40°C to 85°C (ambient temperature). The CDCLVD1208 is packaged in small, 28-pin, 5-mm × 5-mm VQFN package.
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* Data sheet CDCLVD1208 2:8 Low Additive Jitter LVDS Buffer datasheet (Rev. A) PDF | HTML 31 Oct 2016

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

CDCLVD1204EVM — CDCLVD1204 Evaluation Module

The CDCLVD1204/CDCLVD2102 are high-performance, low-additive jitter clock buffers. They have twouniversal input buffers that support single-ended or differential clock inputs and are selectable through a control pin (for CDCLVD1204 only). The devices also feature on-chip bias generators that can (...)
User guide: PDF
Not available on TI.com
Simulation model

CDCLVD1208 IBIS Model (Rev. B)

SLLM090B.ZIP (14 KB) - IBIS Model
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Design tool

CLOCK-TREE-ARCHITECT — Clock tree architect programming software

Clock tree architect is a clock tree synthesis tool that streamlines your design process by generating clock tree solutions based on your system requirements. The tool pulls data from an extensive database of clocking products to generate a system-level multi-chip clocking solution.
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Design tool

PLLATINUMSIM-SW — PLLatinum Sim Tool

PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.

Supported products & hardware

Supported products & hardware

Products
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IQ demodulators
LMX8410L — High-Performance Mixer With Integrated Synthesizer
Hardware development
Evaluation board
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Software
Application software & framework
TICSPRO-SW — Texas Instruments Clocks and Synthesizers (TICS) Pro Software
IDE, configuration, compiler or debugger
CODELOADER — CodeLoader Software for device register programming
Support software
LMX9830-SW — LMX9830 Application Notes, Software, and Tools LMX9838-SW — LMX9838 Application Notes, Software, and Tools
Download options
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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