SNAS410F May   2008  – July 2016 DAC121S101QML-SP

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 DAC121S101QML-SP Electrical Characteristics DC Parameters
    6. 6.6 DAC121S101QML-SP Electrical Characteristics AC and Timing Characteristics
    7. 6.7 DAC121S101QML Electrical Characteristics Radiation Electrical Characteristics
    8. 6.8 DAC121S101QML-SP Electrical Characteristics Operating Life Test Delta Parameters TA at 25°C
    9. 6.9 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 DAC Section
      2. 7.3.2 Resistor String
      3. 7.3.3 Output Amplifier
      4. 7.3.4 Power-On Reset
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-Down Modes
    5. 7.5 Programming
      1. 7.5.1 Serial Interface
      2. 7.5.2 Input Shift Register
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Bipolar Operation
      2. 8.1.2 DSP and Microprocessor Interfacing
        1. 8.1.2.1 ADSP-2101/ADSP2103 Interfacing
        2. 8.1.2.2 80C51/80L51 Interface
        3. 8.1.2.3 68HC11 Interface
        4. 8.1.2.4 Microwire Interface
      3. 8.1.3 Radiation Environments
        1. 8.1.3.1 Total Ionizing Dose
          1. 8.1.3.1.1 DAC121S101WGRQV 5962R0722601VZA
          2. 8.1.3.1.2 DAC121S101WGRLV 5962R0722602VZA
        2. 8.1.3.2 Single Event Latch-Up and Functional Interrupt
        3. 8.1.3.3 Single Event Upset
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
    1. 9.1 Using References as Power Supplies
      1. 9.1.1 LM4050QML-SP
      2. 9.1.2 LP3985
      3. 9.1.3 LP2980-N
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
      2. 11.1.2 Device Nomenclature
        1. 11.1.2.1 Specification Definitions
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Engineering Samples

1 Features

  • 5962R07726
    • Total Ionizing Dose 100 krad(Si)
    • Single Event Latch-up Immune
      120 MeV-cm2/mg
    • Single Event Functional Interrupt Immune
      120 MeV-cm2/mg (See Radiation Report)
  • Ensured Monotonicity
  • Low Power Operation
  • Rail-to-Rail Voltage Output
  • Power-On Reset to Zero Volts Output
  • SYNC Interrupt Facility
  • Wide Power Supply Range (2.7 V to 5.5 V)
  • Small Packages
  • Power-Down Feature
  • Key Specifications
    • Resolution: 12 Bits
    • DNL: +0.21, –0.10 LSB (Typical)
    • Output Settling Time: 12.5 µs (Typical)
    • Zero Code Error: 2.1 mV (Typical)
    • Full-Scale Error: −0.04% FS (Typical)
    • Power Dissipation
      • Normal Mode: 0.52 mW (3.6 V) and 1.19 mW (5.5 V) Typical
      • Power-Down Mode: 0.014 µW (3.6 V) and 0.033 µW (5.5 V) Typical

2 Applications

  • Satellites
    • Altitude and Orbit Control
    • Precision Sensors
    • Motor Control
  • High Temperatures

3 Description

The DAC121S101QML-SP device is a full-featured, general-purpose, 12-bit voltage-output digital-to-analog converter (DAC) that can operate from a single 2.7-V to 5.5-V supply and consumes just
177 µA of current at 3.6 V. The on-chip output amplifier allows rail-to-rail output swing and the three-wire serial interface operates at clock rates up to
20 MHz over the specified supply voltage range and is compatible with standard SPI, QSPI, MICROWIRE, and DSP interfaces.

The supply voltage for the DAC121S101QML-SP serves as its voltage reference, providing the widest possible output dynamic range. A power-on reset circuit ensures that the DAC output powers up to zero volts and remains there until there is a valid write to the device. A power-down feature reduces power consumption to less than a microWatt.

The low power consumption and small packages of the DAC121S101QML-SP make it an excellent choice for use in battery-operated equipment.

Device Information(1)

PART NUMBER GRADE PACKAGE
DAC121S101WGRQV 5962R0722601VZA 100 krad 10-lead ceramic SOIC
DAC121S101WGRLV 5962R0722602VZA 100 krad ELDRS-Free 10-lead ceramic SOIC
DAC121S101-MDR 5962R0722601V9A 100 krad Die
DAC121S101WGMPR Pre-Flight Engineering Prototype 10-lead ceramic SOIC
DAC121S101CVAL Ceramic Evaluation Board 10-lead ceramic SOIC
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Functional Block Diagram

DAC121S101QML-SP 30018003.gif

4 Revision History

Changes from E Revision (March 2013) to F Revision

  • Changed data sheet title DAC121S101QML 12-Bit Micro Power Digital-to-Analog Converter With Rail-to-Rail Output to DAC121S101QML-SP Radiation Hardened 12-Bit Micro Power Digital-to-Analog Converter With Rail-to-Rail OutputGo
  • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section.Go

Changes from D Revision (March 2013) to E Revision

  • Changed layout of National Data Sheet to TI formatGo