SNIU028D February 2016 – September 2020 UCD3138 , UCD3138064 , UCD3138064A , UCD3138128 , UCD3138A , UCD3138A64
There are two registers which give the fault detection status: FAULTMUXINTSTAT and FAULTMUXRAWSTAT.
Both have the same bits, but they mean different things.
FAULTMUXRAWSTAT shows the instantaneous status of each fault.
FAULTMUXINTSTAT shows any faults which:
This is especially useful for detecting faults which may occur only for short times during a period. Reading from this register clears the fault from the fault detection interrupt logic. This interrupt logic is independent of the signals routed to the Fault Mux and to the DPWM. These signals are latched only in the DPWM logic, not anywhere else.
The registers also have bits for LFO_FAIL (Low Frequency Oscillator Fail) and for DCM_DETECT (Discontinuous Mode Detected). These sources are described elsewhere. Neither of these signals is used as an input to the Fault Mux.