SNIU028D February 2016 – September 2020 UCD3138 , UCD3138064 , UCD3138064A , UCD3138128 , UCD3138A , UCD3138A64
Address 0x0008_001C – Front End Control 2 EADC Trim Register
Address 0x000B_001C – Front End Control 1 EADC Trim Register
Address 0x000E_001C – Front End Control 0 EADC Trim Register
29 | 24 | 23 | 22 | 21 | 16 |
GAIN3_TRIM | Reserved | GAIN2_TRIM |
R/W-01 1000 | R-00 | R/W-010 1000 |
15 | 14 | 13 | 8 | 7 | 6 | 5 | 0 |
Reserved | GAIN1_TRIM | Reserved | GAIN0_TRIM |
R-00 | R/W-01 1000 | R-00 | R/W-01 1000 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
29-24 | GAIN3_TRIM | R/W | 01 1000 | Sets trim for 8X AFE Gain. Register will be programmed during test and should not be overwritten by firmware |
23-22 | Reserved | R | 00 | |
21-16 | GAIN2_TRIM | R/W | 01 1000 | Sets trim for 4X AFE Gain. Register will be programmed during test and should not be overwritten by firmware. |
15-14 | Reserved | R | 00 | |
13-8 | GAIN1_TRIM | R/W | 01 1000 | Sets trim for 2X AFE Gain. Register will be programmed during test and should not be overwritten by firmware. |
7-6 | Reserved | R | 00 | |
5-0 | GAIN0_TRIM | R/W | 01 1000 | Sets trim for 1X AFE Gain. Register will be programmed during test and should not be overwritten by firmware. |