SNIU028D February 2016 – September 2020 UCD3138 , UCD3138064 , UCD3138064A , UCD3138128 , UCD3138A , UCD3138A64
Address FFFFFE94
11 | 10 | 9 | 8 | 7 | 6 | 5 | 0 |
BUSY | Reserved | PAGE_ ERASE | MASS_ ERASE | Reserved | PAGE_SEL |
R-0 | R-0 | R/W-0 | R/W-0 | R-0 | R/W-000000 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
11 | BUSY | R | 0 | Data Flash Busy Indicator 0 = Data Flash available for read/write/erase access 1 = Data Flash unavailable for read/write/erase access |
10 | Reserved | R | 0 | |
9 | PAGE_ERASE | R/W | 0 | Data Flash Page Erase Enable 0 = No Page Erase initiated on Data Flash (Default) 1 = Page Erase Cycle on Data Flash enabled. Page erased is based on PAGE_SEL (Bits 4-0). This bit is cleared upon completion of Page Erase cycle. |
8 | MASS_ERASE | R/W | 0 | Data Flash Mass Erase Enable 0 = No Mass Erase initiated on Data Flash (Default) 1 = Mass Erase of Data Flash enabled. Bit is cleared upon completion of mass erase. |
7-6 | Reserved | R | 0 | |
5-0 | PAGE_SEL | R/W | 000000 | Selects page to be erased during Page Erase Cycle |