SNIU028D February 2016 – September 2020 UCD3138 , UCD3138064 , UCD3138064A , UCD3138128 , UCD3138A , UCD3138A64
Address FFFFFFE8
The Abort Exception Status Register shows the abort cause.
15 | 14 | 13 | 12 | 8 |
ADRABT | MEMABT | PACCVIO | Reserved |
R/W-0 | R/W-0 | R/W-0 | R-0 0000 0000 0000 |
7 | 0 |
Reserved |
R-0 0000 0000 0000 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
15 | ADRABT | R/W | 0 | is bit represents the illegal address abort. An illegal address access was detected in user mode. An abort was generated due to an illegal address access from either the MPU or system User and privilege modes (read) 0 = No illegal address 1 = Abort caused by an illegal address User and privilege modes (write) 0 = Clears bit to 0 1 = No effect |
14 | MEMABT | R/W | 0 | This bit represents the memory access abort. This bit indicates an illegal memory access was detected in user mode. An abort was generated due to the illegal memory access from either the MPU or system. User and privilege modes (read) 0 = No illegal memory access 1 = Abort caused by an illegal memory access User and privilege modes (write) 0 = Clears bit to 0 1 = No effect |
13 | PACCVIO | R/W | 0 | This bit represents the peripheral access violation error. This bit indicates a peripheral access violation error was detected during a peripheral Register access in user mode. An abort was generated due to a peripheral access violation. User and privilege modes (read) 0 = No peripheral access violation 1 = Abort caused by a peripheral access violation User and privilege modes (write) 0 = Clears bit to 0 1 = No effect |
12-0 | Reserved | R | 0 0000 0000 0000 |