SNIU028D February 2016 – September 2020 UCD3138 , UCD3138064 , UCD3138064A , UCD3138128 , UCD3138A , UCD3138A64
Address FFF7F620
24 | 23 |
I2C_MODE_EN* | CLK_HIS_DIS* or CLK_HI_EN* |
R/W-0 | R/W-1 or R/W-0 |
22 | 21 | 20 | 19 | 18 | 17 | 16 |
MASTER_EN | SLAVE_EN | CLK_LO_DIS | IBIAS_B_EN | IBIAS_A_EN | SCL_DIR | SCL_VALUE |
R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
SCL_MODE | SDA_DIR | SDA_VALUE | SDA_MODE | CNTL_DIR | CNTL_VALUE | CNTL_MODE | ALERT_DIR |
R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ALERT_VALUE | ALERT_MODE | CNTL_INT _EDGE | FAST_MODE_PLUS | FAST_MODE | BUS_LO_INT_EDGE | ALERT_EN | RESET |
R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
24 | I2C_MODE_EN* | R/W | 0 | I2C Mode Enable – Utilized for Master mode only 0 = I2C Mode Disabled (Default) 1 = I2C Mode Enabled The only effect of I2C_MODE_EN is to remove the automatic insertion of number of bytes in block writes in master mode. *Only available on UCD3138A64 and UCD3138128 A and non-A versions |
23 | CLK_HI_DIS* | R/W | 1 | Clock High Timeout Disable 0 = Clock High Timeout Enabled 1 = Clock High Timeout Disabled (Default) *Only available on UCD3138A64 and UCD3138128 A and non-A versions |
23 | CLK_HI_EN* | R/W | 0 | Clock High Timeout Enable 0 = Clock High Timeout Disabled (Default) 1 = Clock High Timeout Enabled *Only available on UCD3138A and UCD3138064A |
22 | MASTER_EN | R/W | 0 | PMBus Master Enable 0 = Disables PMBus Master capability (Default) 1 = Enables PMBus Master capability |
21 | SLAVE_EN | R/W | 0 | PMBus Slave Enable 0 = Disables PMBus Slave capability 1 = Enables PMBus Slave capability (Default) |
20 | CLK_LO_DIS | R/W | 0 | Clock Low Timeout Disable 0 = Clock Low Timeout Enabled (Default) 1 = Clock Low Timeout Disabled |
19 | IBIAS_B_EN | R/W | 0 | PMBus Current Source B Control 0 = Disables Current Source for PMBUS address detection thru ADC (Default) 1 = Enables Current Source for PMBUS address detection thru ADC |
18 | IBIAS_A_EN | R/W | 0 | PMBus Current Source A Control 0 = Disables Current Source for PMBUS address detection thru ADC (Default) 1 = Enables Current Source for PMBUS address detection thru ADC |
17 | SCL_DIR | R/W | 0 | Configures direction of PMBus clock pin in GPIO mode 0 = PMBus clock pin configured as output (Default) 1 = PMBus clock pin configured as input |
16 | SCL_VALUE | R/W | 0 | Configures output value of PMBus clock pin in GPIO Mode 0 = PMBus clock pin driven low in GPIO Mode (Default) 1 = PMBus clock pin driven high in GPIO Mode |
15 | SCL_MODE | R/W | 0 | Configures mode of PMBus Clock pin 0 = PMBus clock pin configured in functional mode (Default) 1 = PMBus clock pin configured as GPIO |
14 | SDA_DIR | R/W | 0 | Configures direction of PMBus data pin in GPIO mode 0 = PMBus data pin configured as output (Default) 1 = PMBus data pin configured as input |
13 | SDA_VALUE | R/W | 0 | Configures output value of PMBus data pin in GPIO Mode 0 = PMBus data pin driven low in GPIO Mode (Default) 1 = PMBus data pin driven high in GPIO Mode |
12 | SDA_MODE | R/W | 0 | Configures mode of PMBus Data pin 0 = PMBus data pin configured in functional mode (Default) 1 = PMBus data pin configured as GPIO |
11 | CNTL_DIR | R/W | 0 | Configures direction of Control pin in GPIO mode 0 = Control pin configured as output (Default) 1 = Control pin configured as input |
10 | CNTL_VALUE | R/W | 0 | Configures output value of Control pin in GPIO Mode 0 = Control pin driven low in GPIO Mode (Default) 1 = Control pin driven high in GPIO Mode |
9 | CNTL_MODE | R/W | 0 | Configures mode of Control pin 0 = Control pin configured in functional mode (Default) 1 = Control pin configured as GPIO |
8 | ALERT_DIR | R/W | 0 | Configures direction of Alert pin in GPIO mode 0 = Control pin configured as output (Default) 1 = Control pin configured as input |
7 | ALERT_VALUE | R/W | 0 | Configures output value of Alert pin in GPIO Mode 0 = Alert pin driven low in GPIO Mode (Default) 1 = Alert pin driven high in GPIO Mode |
6 | ALERT_MODE | R/W | 0 | Configures mode of Alert pin 0 = Alert pin configured in functional mode (Default) 1 = Aler3 pin configured as GPIO |
5 | CNTL_INT_EDGE | R/W | 0 | Control Interrupt Edge Select 0 = Interrupt generated on falling edge of Control (Default) 1 = Interrupt generated on rising edge of Control |
4 | FAST_MODE _PLUS | R/W | 0 | Fast Mode Plus Enable 0 = Standard 100 KHz mode enabled (Default) 1 = Fast Mode Plus enabled (1MHz operation on PMBus) |
3 | FAST_MODE | R/W | 0 | Fast Mode Enable 0 = Standard 100 KHz mode enabled (Default) 1 = Fast Mode enabled (400KHz operation on PMBus) |
2 | BUS_LO_INT _EDGE | R/W | 0 | Clock Low Timeout Interrupt Edge Select 0 = Interrupt generated on rising edge of clock low timeout (Default) 1 = Interrupt generated on falling edge of clock low timeout |
1 | ALERT_EN | R/W | 0 | Slave Alert Enable 0 = PMBus Alert is not driven by slave, pulled up high on PMBus (Default) 1 = PMBus Alert driven low by slave |
0 | RESET | R/W | 0 | PMBus Interface Synchronous Reset 0 = No reset of internal state machines (Default) 1 = Control state machines are reset to initial states |