SNLA433 august   2023 DS320PR1601 , DS320PR410 , DS320PR810 , SN75LVPE5412 , SN75LVPE5421

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Device Overview
    1. 2.1 Receiver Equalization
    2. 2.2 Redriver Linearity
    3. 2.3 PCIe Links with Linear Redrivers
    4. 2.4 Redriver EQ Tuning
      1. 2.4.1 Detailed Description of Parameters Calibration
  6. 3General Guidelines for Optimal CTLE and Gain Selection
  7. 4Summary
  8. 5References

2.2 Redriver Linearity

The linearity of the data path is specifically designed to preserve any transmit equalization while keeping receiver equalization effective. It allows unobstructed PCIe 5.0 link training for automatic optimization of the PCIe TX and RX equalization functions on both the root complex and the endpoint sides of the link. Table 2-2 shows typical PCIe TX preset values (pre-shoot and de-emphasis levels) before the presets are passed through the redrivers and after the PCIe TX presets are re-driven. This data was measured with adherence to the PCI-Express 5.0 Base specification. Note that the pre- and post- are well within the required limits.

Table 2-2 PCIe TX Preset Values Before and After Redrivers
Preset PCIe Preset Limits Typical Measured after Redriver
Recommended Pre-Shoot Recommended Post-Shoot Pre-Shoot (dB) Post-Shoot (dB)
P0 0 -6 ± 1.5 0 -5.69
P1 0 -3.5 ± 1.0 0 -3.34
P2 0 -4.4 ± 1.5 0 -3.9
P3 0 -2.5 ± 1.0 0 -2.41
P4 0 0 0 0
P5 1.9 ± 1.0 0 1.97 0
P6 2.5 ± 1.5 0 2.42 0
P7 3.5 ± 1.0 -6.0 ± 1.5 3.43 -5.36
P8 3.5 ± 1.0 -3.5 ± 1.0 3.37 -3.36
P9 3.5 ± 1.0 0 3.36 0