SoC die temperature affects the IO delays, causing changes in the size and location of the passing regions, as shown in Figure 2-2.

Figure 2-2 Temperature Effect on Passing Regions

The boundary between the two passing regions moves with temperature. If that boundary shifts during operation and crosses over the selected tuning point, reads from the OSPI controller will fail to read correct data. Figure 2-2 shows an example of a poorly placed tuning point. The plot on the left shows tuning at low temperature. As temperature increases, IO delays increase, causing the round trip delay to increase. TX and RX PDL values remain the same, and as a result, at high temperatures the sampling point will be in the wrong ref_clk cycle. To account for this, the OSPI tuning algorithm identifies the largest passing region, and selects a TX/RX combination far away from the moving boundary between ref_clk cycles.