To avoid the above results, the below workaround could be an option, as shown in Figure 2-8. The global load event of ePWM1 is defined as CTR = Zero, while the global load event of ePWM2 is defined as sync event or CTR = Zero. During the ISR to update the ePWM registers, it is suggested to monitor the new CMPA and TBPHS values with their previous ones. If the new TBPHS register value and counter-compare register value will cause the PWM counter to jump over the CMPA value, the counter-compare register value can be changed temporarily, and then changed back to the required one in the next ISR.

Using the same example as above, when the new phase register TBPHS’ is updated to 400, CMPA is required to be changed to CMPA’= TBPHS’+1=401. Then, one shot load mode is enabled, so when the next global event occurs, the expected phase shift can be still maintained, while the duty cycle of ePWM2 is also clamped under the control. Then, during the next ISR, it is required to change the CMPA value back to the expected one, and also enable one shot load mode again, so that the duty cycle is corrected in the following switching cycle.

Figure 2-8 Workaround for the Corner Case