SPRAD12A July   2022  – February 2023 F29H850TU , F29H859TU-Q1 , TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1 , TMS320F28075 , TMS320F28075-Q1 , TMS320F28076 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377D-EP , TMS320F28377D-Q1 , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28378D , TMS320F28378S , TMS320F28379D , TMS320F28379D-Q1 , TMS320F28379S , TMS320F28384D , TMS320F28384D-Q1 , TMS320F28384S , TMS320F28384S-Q1 , TMS320F28386D , TMS320F28386D-Q1 , TMS320F28386S , TMS320F28386S-Q1 , TMS320F28388D , TMS320F28388S , TMS320F28P550SJ , TMS320F28P559SJ-Q1 , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P659DH-Q1 , TMS320F28P659DK-Q1 , TMS320F28P659SH-Q1

 

  1.   Abstract
  2.   Trademarks
  3. Introduction
  4. SysConfig
  5. Time-Base (TB) Submodule
    1. 3.1 Setting the Frequency
    2. 3.2 Applying a Phase Shift
    3. 3.3 Setting up the Synchronization (Sync) Scheme
  6. Counter-Compare (CC) and Action-Qualifier (AQ) Submodules
    1. 4.1 Calculating the Duty Cycle
  7. Deadband (DB) Submodule
    1. 5.1 Setting up Signal Pairs
  8. Verifying the Output
    1. 6.1 Checking the Duty Cycle and Dead-Time Insertion
    2. 6.2 Checking the Phase Shift Applied
  9. Trip-Zone (TZ) and Digital Compare (DC) Submodules
    1. 7.1 Drive Outputs Low for an ePWM Cycle Upon Trip Condition Set Through CMPSS
    2. 7.2 Drive Outputs Low Until Cleared Through Software Upon Trip Condition set Through GPIO
  10. Event-Trigger (ET) Submodule
    1. 8.1 Setting Up Time-Base Interrupts
  11. Global Load
    1. 9.1 Applying Global Loading and One-Shot Load Feature
    2. 9.2 Linking the ePWM Modules
    3. 9.3 Updating Action Qualifier Settings and Counter Compare Values Through Global Loading
  12. 10Summary
  13. 11References
  14. 12Revision History

Linking the ePWM Modules

In many applications, such as a three-phase interleaved LLC implementation, it is useful to be able to update key ePWM parameters simultaneously across different modules. C2000’s ePWM Type-4 achieves this though its linking feature. Multiple ePWM modules can be linked together in order to update TBPRD, CMPA, CMPB, CMPC, CMPD, and GLDCTL2 (Global Load control 2) registers simultaneously.

For this case, link to CMPA and CMPB of ePWM2 and ePWM3 to ePWM1, meaning every time you update the value of CMPA or CMPB for ePWM1, the same value is updated for CMPA/CMPB of ePWM2/3.

The linking setting for these parameters is shown in GUID-428157EB-EE01-482F-A9A6-D9E9ECC79DDF.html#FIG_RP5_1CV_4TB and GUID-E2C42C17-E12A-476F-A0B6-6D7C0EE85969.html#FIG_CVB_QGV_4TB.

In the main application code, you can utilize the linking feature by updating only CMPA and CMPB of EPWM1. EPWM2 and EPWM3’s CMPA/CMPB values are updated simultaneously to the same value.

The action qualifier settings do not have a linking feature, so all three ePWM modules' action qualifiers settings need to be updated independently. However, because the one-shot load across all three modules is linked and the shadow registers for these settings are latched by the one-shot load signal, the shadows may be used to update all three ePWM modules' AQCTLA settings simultaneously.