SPRADB3A October   2023  – November 2024 AM2612 , AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1 , AM263P4 , AM263P4-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Feature Differences Between AM26x Devices
  5. 2 Package Options
  6. 3 Feature Differences Between AM263 and AM263P
    1. 3.1 Feature Differences for System Consideration
      1. 3.1.1 New Features in AM263P
        1. 3.1.1.1 Resolver Peripheral
          1. 3.1.1.1.1 Migration From Software to Hardware Resolver
        2. 3.1.1.2 Trigonometric Math Unit
        3. 3.1.1.3 Remote L2 Cache
      2. 3.1.2 Memory Subsystem Differences
      3. 3.1.3 CONTROLSS Module Differences
        1. 3.1.3.1 ADC Feature Differences and Additions
        2. 3.1.3.2 ADC Safety Tile Additions
        3. 3.1.3.3 ADC_R Module Addition
      4. 3.1.4 QSPI/OSPI Module Differences
      5. 3.1.5 Hardware Security Module Differences
      6. 3.1.6 Hardware Differences
        1. 3.1.6.1 Sourcing VPP With ANALDO
      7. 3.1.7 Feature Omissions in AM263P
  7. 4 Software Changes Between AM263 and AM263P SDK
  8. 5 Feature Differences Between AM263 and AM261 Devices
    1. 5.1 Feature Differences for System Consideration
      1. 5.1.1 New Features in AM261
        1. 5.1.1.1 Universal Serial Bus (USB)
        2. 5.1.1.2 Trigonometric Math Unit
        3. 5.1.1.3 Remote L2 Cache
      2. 5.1.2 Memory Subsystem Differences
      3. 5.1.3 CONTROLSS Module Differences
        1. 5.1.3.1 ADC Feature Differences and Additions
        2. 5.1.3.2 ADC Safety Tile Additions
      4. 5.1.4 CPSW Feature Additions
      5. 5.1.5 Hardware Differences
        1. 5.1.5.1 Sourcing VPP With ANALDO
      6. 5.1.6 Feature Reductions in AM261
  9. 6 Software Changes Between AM263 and AM261 SDK
  10. 7 Feature Differences Between AM263P and AM261 Devices
    1. 7.1 Feature Differences for System Consideration
      1. 7.1.1 New Features in AM261
        1. 7.1.1.1 General-Purpose Memory Controller (GPMC)
        2. 7.1.1.2 Universal Serial Bus (USB)
      2. 7.1.2 Memory Subsystem Differences
      3. 7.1.3 CPSW Feature Additions
      4. 7.1.4 ADC Module Differences
      5. 7.1.5 Feature Omissions and Reductions in AM261
  11. 8 Software Changes Between AM263P and AM261 SDK
  12. 9 List of Errata Fixes in AM26x Devices
  13. 10Revision History

3.1.2 Memory Subsystem Differences

AM263P comes with three changes to the memory module. The first is an increase in available Tightly-Coupled Memory (TCM) from 64kB to 128kB per CPU core. The second is an increase in the maximum total on-chip RAM (SRAM) from 2MB to 3MB depending on device variants. Details on the specific memory sizes per device variants can be found within the respective device datasheets under the Operating Performance Points section.

The final change is the addition of a Remote L2 (RL2) cache for external memory, programmable up to 128kB per CPU core. This RL2 cache allows users to cache the system flash into the SoC memory system. For full details on this feature, see the Remote L2 Cache subchapter of the AM263P Technical Reference Manual.