SPRADI6 May   2024 TMS320F2800132 , TMS320F2800133 , TMS320F2800135 , TMS320F2800137 , TMS320F2800152-Q1 , TMS320F2800153-Q1 , TMS320F2800154-Q1 , TMS320F2800155 , TMS320F2800155-Q1 , TMS320F2800156-Q1 , TMS320F2800157 , TMS320F2800157-Q1 , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P659DH-Q1 , TMS320F28P659DK-Q1 , TMS320F28P659SH-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Overview of C2000™ MCU Devices in Appliances
  6. 3Introduction of IEC/UL 60730-1/60335-1 Standards
  7. 4Diagnostic Libraries for UL/IEC 60730-1/60335-1 Provided by C2000™
    1. 4.1 Stack Overflow Detection
    2. 4.2 Watchdog
    3. 4.3 CPU and FPU Registers
    4. 4.4 Program Counter (PC)
    5. 4.5 Clock
    6. 4.6 RAM
    7. 4.7 Flash
    8. 4.8 ADC
    9. 4.9 Cycle Time and Memory Usage
  8. 5References

Watchdog

The main purpose of watchdog self-test is to verify whether the watchdog counter overflow can be triggered properly. During the self-test, the watchdog counter overflow trigger function is switched from reset to interrupt. By checking whether the program jumps to the watchdog interrupt within a certain period of time and counting the number of triggers, the normal functionality of the watchdog can be determined. Figure 4-3 shows the watchdog test structure. The example project is found in f280013x\examples\ sdl_ex_watchdog.

When the system is working normally, the watchdog reset mode needs to be enabled and the application interrupts need to feed the watchdog regularly. This can meet the test requirements of periodic watchdog test and PC pointer test at the same time.

 Watchdog Test
                    Structure Figure 4-3 Watchdog Test Structure