SPRZ193T January   2003  – December 2023 SM320F2812 , SM320F2812-EP , SMJ320F2812 , TMS320F2810 , TMS320F2810-Q1 , TMS320F2811 , TMS320F2811-Q1 , TMS320F2812 , TMS320F2812-Q1

 

  1.   1
  2. 1Introduction
  3. 2Device and Development Tool Support Nomenclature
  4. 3Device Markings
  5. 4Usage Notes and Known Design Exceptions to Functional Specifications
    1. 4.1 Usage Notes
      1. 4.1.1 PIE: Spurious Nested Interrupt After Back-to-Back PIEACK Write and Manual CPU Interrupt Mask Clear Usage Note
  6. 5Known Design Exceptions to Functional Specifications
    1.     Advisory
    2.     Advisory
    3.     Advisory
    4.     Advisory
    5.     Advisory
    6.     Advisory
    7.     Advisory
    8.     Advisory
    9.     Advisory
    10.     Advisory
    11.     Advisory
    12.     Advisory
    13.     Advisory
    14.     Advisory
    15.     Advisory
    16.     Advisory
    17.     Advisory
    18.     Advisory
    19.     Advisory
    20.     Advisory
    21.     Advisory
    22.     Advisory
    23.     Advisory
    24.     Advisory
    25.     Advisory
    26.     Advisory
    27.     Advisory
    28.     Advisory
    29.     Advisory
    30.     Advisory
    31.     Advisory
  7. 6Documentation Support
  8. 7Trademarks
  9. 8Revision History

Advisory

Memory: Set Device Emulation Register Bits for On-Chip RAM Performance

Revision(s) Affected

0 and A

Details

To get the best performance of on-chip RAM blocks M0/M1/L0/L1/H0, the internal control register bits have to be enabled. The bits are in the Device Emulation Registers.

Workaround(s)

All device initialization code should include the following register updates. These are EALLOW-protected registers.

Register Address          Value

          0x950                  0x0300

          0x951                  0x0300

          0x952                  0x0300

          0x953                  0x0300

          0x954                  0x0300

Code Example:


EALLOW
MOVL     XAR1,#0x0950
MOVL     XAR2,#0x0300
MOV      *XAR1++,AR2
MOV      *XAR1++,AR2
MOV      *XAR1++,AR2
MOV      *XAR1++,AR2
MOV      *XAR1++,AR2
EDIS

The Code Composer GEL init files will initialize these for emulation and debug environment. From the next silicon revision onward, this initialization is automatically done upon reset.