SPRZ488E March 2022 – May 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
Table 1-1 lists all usage notes and the applicable silicon revision(s). Table 1-2 lists all advisories, modules affected, and the applicable silicon revision(s).
Module | DESCRIPTION | SILICON REVISIONS AFFECTED | |
---|---|---|---|
AM263x | |||
1.0A | 1.1 | ||
CLOCKS | i2324 — No synchronizer present between GCM and GCD status signals | YES |
YES |
QSPI | i2364 — QSPI: Access to address beyond 8MB is not supported in mem map mode | YES | YES |
VDDA | i2348 — VDDA1V8 Static Power leakage | YES |
NO |
MODULE | DESCRIPTION | SILICON REVISIONS AFFECTED | |
---|---|---|---|
AM263x | |||
1.0A | 1.1 | ||
ADC | i2346 — ADC result has Error when switching between odd and even channels | YES |
NO |
ADC | i2347 — VREF current consumption of ADC is random at powerup | YES |
NO |
ADC | i2349 — ADC VrefHi Loading increase in powerdown | YES | NO |
CONTROLSS | i2352 — CONTROLSS-SDFM: Dynamically Changing Threshold Settings (LLT, HLT), Filter Type, or COSR Settings Will Trigger Spurious Comparator Events | YES | YES |
CONTROLSS | i2353 — CONTROLSS-SDFM: Dynamically Changing Data Filter Settings (Such as Filter Type or DOSR) Will Trigger Spurious Data Acknowledge Events | YES | YES |
CONTROLSS | i2354 — CONTROLSS-SDFM: Two Back-to-Back Writes to SDCPARMx Register Bit Fields CEVT1SEL, CEVT2SEL, and HZEN Within Three SD-Modulator Clock Cycles can Corrupt SDFM State Machine, Resulting in Spurious Comparator Events | YES | YES |
CONTROLSS | i2355 — CONTROLSS-ADC: DMA Read of Stale Result | YES | YES |
CONTROLSS | i2356 — CONTROLSS-ADC: Interrupts may Stop if INTxCONT (Continue-to-Interrupt Mode) is not Set | YES | YES |
CONTROLSS | i2357 — CONTROLSS-ePWM: An ePWM Glitch can Occur if a Trip Remains Active at the End of the Blanking Window | YES | YES |
CONTROLSS | i2358 — CONTROLSS-ePWM: Trip Events Will Not be Filtered by the Blanking Window for the First 3 Cycles After the Start of a Blanking | YES | YES |
CONTROLSS | i2359 — CONTROLSS-CMPSS:Prescaler counter behavior different from spec when DACSOURCE is made 0 or reconfigured as 1 | YES | YES |
CONTROLSS | i2405 — CONTROLSS: Race condition OUTPUT_XBAR and PWM_XBAR resulting in event miss | YES | YES |
CPSW | i2345 — CPSW: Ethernet Packet corruption occurs if CPDMA fetches a packet which spans across memory banks | YES | YES |
CPSW | i2401 — CPSW: Host Timestamps Cause CPSW Port to Lock up | YES | YES |
CPSW | i2402 — CPSW: Ethernet to Host Checksum Offload does not work | YES | YES |
CPSW | i2438 — CPSW - Host to Ethernet Checksum Generation with VLAN ADD/Remove | YES | YES |
CPSW | i2439 — CPSW: Host to Ethernet Timestamp Accuracy Issue | YES | YES |
CRC | i2386 — CRC: CRC 8-bit data width and CRC8-SAE-J1850 and CRC8-H2F possible use in CAN module is not supported | YES | YES |
DCC | i2395 — DCC Module Frequency Comparison can Report Erroneous Results | YES | YES |
GPMC | i2313 — GPMC: Sub-32-bit read issue with NAND and FPGA/FIFO | YES | YES |
M4 ROM | i2403 — M4 ROM: SBL redundant boot image feature not supported on HSSE devices | NO | YES |
MBOX | i2404 — MBOX: Race condition in mailbox registers resulting in events miss | YES | YES |
McSPI | i2350 — McSPI data transfer using EDMA in ‘ABSYNC’ mode stops after 32 bits transfer | YES | YES |
MDIO | i2329 — MDIO interface corruption (CPSW and PRU-ICSS) | YES | NO |
PBIST | i2374 — PBIST fails if clock frequency of R5SS_CORE_CLK is not same as R5FSS_CLK_SELECTED frequency | YES | YES |
SOC CONTROL | i2392 — Race condition in mem-init capture registers resulting in events miss | YES | YES |
BUS SAFETY | i2393 — Granular error status not logged in BUS_SAFETY_ERR registers for the detected faults | YES | YES |
SOC CONTROL | i2394 — Race condition in interrupt and error aggregator capture registers resulting in events miss | YES | YES |
SFDM | i2375 — SDFM module event flags (SDIFLG.FLTx_FLG_CEVTx) do not get set again if the comparator event is still active and digital filter path (using SDCOMPxCTL.CEVTxDIGFILTSEL) is being selected | YES | YES |
UART | i2310 — USART: Erroneous triggering of timeout interrupt | YES | YES |
UART | i2311 — USART: Spurious DMA Interrupts | YES | YES |
RAM SEC | i2427 — RAM SEC can cause Spurious RAM writes resulting in L2 & MBOX memory corruption | YES | YES |
AES | i2428 — AES in DTHE generates extra dma request for data_in at the end of GCM encrypt | YES | YES |
ICSS | i2433 — ICSS: Reading the 64-bit IEP timer does not have a lock MSW logic when LSW is read | YES | YES |
CPSW | i2438 — CPSW: Host to Ethernet Checksum Generation with VLAN ADD/Remove | YES | YES |
CPSW | i2439 — CPSW: Host to Ethernet Timestamp Accuracy Issue | YES | YES |