TIDUF53 December   2023 DRV8210 , INA350 , MSPM0L1306

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Terminology
    2. 1.2 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 System Design Theory
      2. 2.2.2 Bridge Biasing
      3. 2.2.3 INA Stage
      4. 2.2.4 Filter Design
    3. 2.3 Highlighted Products
      1. 2.3.1 MCU-MSPM0L1306
      2. 2.3.2 OPA-LMV324A
      3. 2.3.3 LDO-TPS7A2433
      4. 2.3.4 INA350
      5. 2.3.5 DRV8210
      6. 2.3.6 ATL431LI
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
      1. 3.1.1 System Connection
    2. 3.2 Software Requirements
    3. 3.3 Running the Demonstration
    4. 3.4 Test Results
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematic
      2. 4.1.2 BOM
      3. 4.1.3 PCB Layout Recommendations
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Author

2.3.3 LDO-TPS7A2433

The TPS7A24 is an 18-V, low quiescent current (2 µA at no load), low-dropout (LDO) linear regulator that comes in both fixed and adjustable variants. The low IQ performance makes the TPS7A24 an excellent choice for battery-powered or line-power applications that are expected to meet increasingly stringent standby-power standards. This device comes in fixed-output and adjustable versions and 1.25% accuracy over temperature.

Additionally, the TPS7A24 also incorporates overcurrent, overshoot pulldown, and thermal shutdown protection. Figure 2-10 shows the functional block diagram.

This device converts the input voltage from the battery (approximately 6 V) to 3.3 V and supplies the voltage to the MCU. The device can provide stable input voltage to the MCU. While a buck converter can be added to provide higher efficiency when stepping down the 6-V battery output, the LDO does not power the motor or valve which are the main sources of current draw. Limiting the efficiency losses to mainly the sleep state current draw of the MCU and amplifiers.

GUID-20231204-SS0I-BFJK-ZKZW-HVR08HR3DHNT-low.svgFigure 2-10 TPS7A2433 Functional Block Diagram