Peripheral Component Interconnect Express (PCIe) is an industry standard for transferring data between CPUs and peripheral devices across motherboards. This protocol is used in personal computers, desktops, enterprise servers, and so on. This application note covers the PCIe clocking basics. This publication also includes the clocking architectures, PCIe test criteria, and post-processing tools..
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PCIe began with the first generation, PCIe Gen 1.1, in 2003. The standard is by the Peripheral Component Interconnect Special Interest Group (PCI-SIG). PCIe replaced the original PCI, a parallel communication bus. PCIe uses a serial point-to-point architecture which allows for higher data transfer rates, as devices are not competing for bandwidth on a bus. PCIe also employs differential HCSL or LP-HCSL clocks instead of the PCI LVCMOS clocks, allowing for better noise immunity, and Spread Spectrum Clocking (SSC) for reduction of electromagnetic interference (EMI). This application note discusses the clocking architectures for the PCIe link, as well as the measurement techniques for jitter and waveform integrity.